From patchwork Mon Dec 11 05:06:46 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 846772 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3yw9vw5L6Rz9s7F for ; Mon, 11 Dec 2017 16:08:28 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="ett96tSY"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3yw9vw46M5zDqmD for ; Mon, 11 Dec 2017 16:08:28 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="ett96tSY"; dkim-atps=neutral X-Original-To: linux-aspeed@lists.ozlabs.org Delivered-To: linux-aspeed@lists.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:400e:c05::241; helo=mail-pg0-x241.google.com; envelope-from=joel.stan@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="ett96tSY"; dkim-atps=neutral Received: from mail-pg0-x241.google.com (mail-pg0-x241.google.com [IPv6:2607:f8b0:400e:c05::241]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3yw9vr6pq6zDqlb for ; Mon, 11 Dec 2017 16:08:24 +1100 (AEDT) Received: by mail-pg0-x241.google.com with SMTP id g7so10162935pgs.0 for ; Sun, 10 Dec 2017 21:08:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=h3V+zjUuLXfGaZ13W3JQN+SZRDMI9YAZ1Gmgc72wsNs=; b=ett96tSYBkNBYK2MSIFf4M4++BwmpwOf/5MbXYk4ILVmb57Q9Xy6MhBlGNbJisbgGo G1wXTSa+MB0dLXudwwTvBojvj1uhMxvG7Rj/HMvibcaE63tcz6cDCQFcVBKVUMKVlbXZ NmZRzaguEwzu9vlwVRak5nvGRL34CsCfrMREbLOmDB9icFtT6AFVJtBd5u/wIzOCOxE3 HuElGtk1Xis2TlbsDdDd7IrjVJpHDLQ30PfV5sX+jZMcfR+Pt18SCWb50jWiaNjSFoWy 3VepLC/iPhJwO3GmhfmHxP7cehHELneaOGTggo51QrovBnDTqE7yz7DBAh2x6aShhVMz tz4g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=h3V+zjUuLXfGaZ13W3JQN+SZRDMI9YAZ1Gmgc72wsNs=; b=X8V9HjfGXAgtSiJePzcycolw43sdkGBmzNdLwUj7gLAqpPwm7/6bWkY8v5Vm2eoTEN LRvXv/eMaNvo5B7//ecLpMbA+B63VtE16KN9JrlIe2OIHUHO6RvOxuHByzG/a7Va/IUv LzQE4W5uAjZUGT5KAWoygY2+pG43/Y2FZhAzyAaDayZfWfpw6hoRSRlJINq2EIwDxdhT rUhNvhKZkSKfhxICm85LsY7xQ3Z/oiFQSLm+GteYDFHt5LBy4H6SvPjJVNcsVgTuC+T0 qVTPcm93vw4b8JcDwIXyxNair9mONJrZQNcq/dxnEShmmtv6x6K3uEGO/i67utRWfTUy OWCQ== X-Gm-Message-State: AJaThX59PfV71h45Iaj47pNFzXnk5TVYVSODKJEOAhr4aP9FlCsT++oc 4Ife/6Xa3NbIyK9cCyD5TpU= X-Google-Smtp-Source: AGs4zMbDux2HbmFfrcw/3gGk/hsm2wvvkXN9uOzm52iIHtbGqG/zXeuYZkORpcJI+BEwhN+itZ45NA== X-Received: by 10.99.103.70 with SMTP id b67mr37238633pgc.211.1512968903063; Sun, 10 Dec 2017 21:08:23 -0800 (PST) Received: from aurora.jms.id.au ([203.0.153.9]) by smtp.gmail.com with ESMTPSA id c24sm24685612pfl.2.2017.12.10.21.08.16 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sun, 10 Dec 2017 21:08:21 -0800 (PST) Received: by aurora.jms.id.au (sSMTP sendmail emulation); Mon, 11 Dec 2017 15:38:13 +1030 From: Joel Stanley To: Rob Herring , Mark Rutland , Arnd Bergmann , Andrew Jeffery , Patrick Venture , Xo Wang , Lei YU Subject: [PATCH 02/20] dt-bindings: gpio: Add ASPEED constants Date: Mon, 11 Dec 2017 15:36:46 +1030 Message-Id: <20171211050704.20621-3-joel@jms.id.au> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20171211050704.20621-1-joel@jms.id.au> References: <20171211050704.20621-1-joel@jms.id.au> X-BeenThere: linux-aspeed@lists.ozlabs.org X-Mailman-Version: 2.1.24 Precedence: list List-Id: Linux ASPEED SoC development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-aspeed@lists.ozlabs.org, Benjamin Herrenschmidt , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Jeremy Kerr Errors-To: linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linux-aspeed" These are used to by the device tree to map pin numbers to constants required by the GPIO bindings. Signed-off-by: Joel Stanley --- arch/arm/boot/dts/aspeed-g4.dtsi | 1 + arch/arm/boot/dts/aspeed-g5.dtsi | 1 + include/dt-bindings/gpio/aspeed-gpio.h | 49 ++++++++++++++++++++++++++++++++++ 3 files changed, 51 insertions(+) create mode 100644 include/dt-bindings/gpio/aspeed-gpio.h diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi index 45d815a86d42..100d092e6c07 100644 --- a/arch/arm/boot/dts/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed-g4.dtsi @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 #include "skeleton.dtsi" +#include / { model = "Aspeed BMC"; diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index 5c4ecdba3a6b..1f9d28313f82 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 #include "skeleton.dtsi" +#include / { model = "Aspeed BMC"; diff --git a/include/dt-bindings/gpio/aspeed-gpio.h b/include/dt-bindings/gpio/aspeed-gpio.h new file mode 100644 index 000000000000..56fc4889b2c4 --- /dev/null +++ b/include/dt-bindings/gpio/aspeed-gpio.h @@ -0,0 +1,49 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * This header provides constants for binding aspeed,*-gpio. + * + * The first cell in Aspeed's GPIO specifier is the GPIO ID. The macros below + * provide names for this. + * + * The second cell contains standard flag values specified in gpio.h. + */ + +#ifndef _DT_BINDINGS_GPIO_ASPEED_GPIO_H +#define _DT_BINDINGS_GPIO_ASPEED_GPIO_H + +#include + +#define ASPEED_GPIO_PORT_A 0 +#define ASPEED_GPIO_PORT_B 1 +#define ASPEED_GPIO_PORT_C 2 +#define ASPEED_GPIO_PORT_D 3 +#define ASPEED_GPIO_PORT_E 4 +#define ASPEED_GPIO_PORT_F 5 +#define ASPEED_GPIO_PORT_G 6 +#define ASPEED_GPIO_PORT_H 7 +#define ASPEED_GPIO_PORT_I 8 +#define ASPEED_GPIO_PORT_J 9 +#define ASPEED_GPIO_PORT_K 10 +#define ASPEED_GPIO_PORT_L 11 +#define ASPEED_GPIO_PORT_M 12 +#define ASPEED_GPIO_PORT_N 13 +#define ASPEED_GPIO_PORT_O 14 +#define ASPEED_GPIO_PORT_P 15 +#define ASPEED_GPIO_PORT_Q 16 +#define ASPEED_GPIO_PORT_R 17 +#define ASPEED_GPIO_PORT_S 18 +#define ASPEED_GPIO_PORT_T 19 +#define ASPEED_GPIO_PORT_U 20 +#define ASPEED_GPIO_PORT_V 21 +#define ASPEED_GPIO_PORT_W 22 +#define ASPEED_GPIO_PORT_X 23 +#define ASPEED_GPIO_PORT_Y 24 +#define ASPEED_GPIO_PORT_Z 25 +#define ASPEED_GPIO_PORT_AA 26 +#define ASPEED_GPIO_PORT_AB 27 +#define ASPEED_GPIO_PORT_AC 28 + +#define ASPEED_GPIO(port, offset) \ + ((ASPEED_GPIO_PORT_##port * 8) + offset) + +#endif