From patchwork Mon May 21 04:09:35 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Guo X-Patchwork-Id: 917351 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=kvm-ppc-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="ZNBoLk84"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40q5pK4WnNz9s9p for ; Mon, 21 May 2018 14:46:33 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751872AbeEUEq3 (ORCPT ); Mon, 21 May 2018 00:46:29 -0400 Received: from mail-pl0-f65.google.com ([209.85.160.65]:37091 "EHLO mail-pl0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751643AbeEUEqL (ORCPT ); Mon, 21 May 2018 00:46:11 -0400 Received: by mail-pl0-f65.google.com with SMTP id w19-v6so8049139plq.4; Sun, 20 May 2018 21:46:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=6ACv+jmr95fsRYlHoimgbUkMGRfAvdXlIQIZ6TPsBgY=; b=ZNBoLk84lVa3o2kT1D17CnZWgUcWS5EZMsVxQB0RdvRAkVL1dKRDDqWLsZm4dqG0hO B9sy9eBKKojVxhaXG/pyW6jQu/mfaUOV4oKr/kGI9hJIj5+MnC6KEhAu4EYi/u5LTkHE bMP1PL3tW0S2y9zT4+vhLll9hRE+H35ggxNZsuKuQlyF/WPAMxRHSgLdwg2FrwAmkmXc r/4tDxRraqkrUCf+u4Ye+420teS8bKRrhOoLka5ucqgjlshcjHTEbG+BX/aCZfvYKGbg +8cnDk+Bmu2+Zb6Zu+0mZF8vPSXCz0gQ2DH3UhBIYQsvvRQPxE8wtjiu6cILDSG8ub/t 0rDg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=6ACv+jmr95fsRYlHoimgbUkMGRfAvdXlIQIZ6TPsBgY=; b=AF58Z0sRDyo1cZNnydxMbqyDV4nchzNeFjaaOhwgS5/36wx4NO8D3mk5tzyE0h9t9r +ZTLKyJ3Fd9JB2F9gyakwvsreehAP4+8Uhq/WxmHznn8MNqUj2OVuvYvMYgTA2r5jQZ6 n8KC2RMd1Au2/YzS3aVUM5NlYBqoEjiWASgXwJY/pN5Ytyxrja9BqSD2cUsuFyW1qA1+ JnkKBOnk+FmmgJfDV+Fsi75u33/vPQU8XjS/SkBijn1uKFbj/r5vSWHzDqccneXFTD2+ +7H4+tNKrSLKdfeDYPzT3cbQATZAeTJo/fnjosrAOxO6uaFEbmIX3D+K+XV6p6y8NNoq bwog== X-Gm-Message-State: ALKqPwd72et70Dynqae1w4/dPWJAaLUibPy/1X6F2W/kASbGHGrRCSSB lRMh86e4PQgbg0iF9BT6o4k= X-Google-Smtp-Source: AB8JxZoevnqy98kfumIPoPWXMTBm0r8OE2rx4TMk4hievfNVP0ddFiWeEIayaSwrFO1YsrtCyff/5w== X-Received: by 2002:a17:902:5952:: with SMTP id e18-v6mr19169886plj.351.1526877970832; Sun, 20 May 2018 21:46:10 -0700 (PDT) Received: from simonLocalRHEL7.cn.ibm.com ([112.73.0.89]) by smtp.gmail.com with ESMTPSA id t14-v6sm24575514pfa.31.2018.05.20.21.46.08 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 20 May 2018 21:46:10 -0700 (PDT) From: wei.guo.simon@gmail.com To: linuxppc-dev@lists.ozlabs.org Cc: Paul Mackerras , kvm@vger.kernel.org, kvm-ppc@vger.kernel.org, Simon Guo Subject: [PATCH v3 18/29] KVM: PPC: Book3S PR: always fail transaction in guest privilege state Date: Mon, 21 May 2018 12:09:35 +0800 Message-Id: <1526875786-10372-19-git-send-email-wei.guo.simon@gmail.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1526875786-10372-1-git-send-email-wei.guo.simon@gmail.com> References: <1526875786-10372-1-git-send-email-wei.guo.simon@gmail.com> Sender: kvm-ppc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm-ppc@vger.kernel.org From: Simon Guo Currently kernel doesn't use transaction memory. And there is an issue for privilege guest that: tbegin/tsuspend/tresume/tabort TM instructions can impact MSR TM bits without trap into PR host. So following code will lead to a false mfmsr result: tbegin <- MSR bits update to Transaction active. beq <- failover handler branch mfmsr <- still read MSR bits from magic page with transaction inactive. It is not an issue for non-privilege guest since its mfmsr is not patched with magic page and will always trap into PR host. This patch will always fail tbegin attempt for privilege guest, so that the above issue is prevented. It is benign since currently (guest) kernel doesn't initiate a transaction. Test case: https://github.com/justdoitqd/publicFiles/blob/master/test_tbegin_pr.c Signed-off-by: Simon Guo --- arch/powerpc/include/asm/kvm_book3s.h | 2 ++ arch/powerpc/kvm/book3s_emulate.c | 40 +++++++++++++++++++++++++++++++++++ arch/powerpc/kvm/book3s_pr.c | 11 +++++++++- 3 files changed, 52 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/include/asm/kvm_book3s.h b/arch/powerpc/include/asm/kvm_book3s.h index 43e8bb1..c1cea82 100644 --- a/arch/powerpc/include/asm/kvm_book3s.h +++ b/arch/powerpc/include/asm/kvm_book3s.h @@ -262,9 +262,11 @@ extern void kvmppc_update_lpcr(struct kvm *kvm, unsigned long lpcr, #ifdef CONFIG_PPC_TRANSACTIONAL_MEM void kvmppc_save_tm_pr(struct kvm_vcpu *vcpu); void kvmppc_restore_tm_pr(struct kvm_vcpu *vcpu); +void kvmppc_restore_tm_sprs(struct kvm_vcpu *vcpu); #else static inline void kvmppc_save_tm_pr(struct kvm_vcpu *vcpu) {} static inline void kvmppc_restore_tm_pr(struct kvm_vcpu *vcpu) {} +static inline void kvmppc_restore_tm_sprs(struct kvm_vcpu *vcpu) {} #endif extern int kvm_irq_bypass; diff --git a/arch/powerpc/kvm/book3s_emulate.c b/arch/powerpc/kvm/book3s_emulate.c index c4e3ec6..570339b 100644 --- a/arch/powerpc/kvm/book3s_emulate.c +++ b/arch/powerpc/kvm/book3s_emulate.c @@ -23,6 +23,7 @@ #include #include #include +#include #include "book3s.h" #include @@ -48,6 +49,8 @@ #define OP_31_XOP_EIOIO 854 #define OP_31_XOP_SLBMFEE 915 +#define OP_31_XOP_TBEGIN 654 + /* DCBZ is actually 1014, but we patch it to 1010 so we get a trap */ #define OP_31_XOP_DCBZ 1010 @@ -363,6 +366,43 @@ int kvmppc_core_emulate_op_pr(struct kvm_run *run, struct kvm_vcpu *vcpu, break; } +#ifdef CONFIG_PPC_TRANSACTIONAL_MEM + case OP_31_XOP_TBEGIN: + { + if (!cpu_has_feature(CPU_FTR_TM)) + break; + + if (!(kvmppc_get_msr(vcpu) & MSR_TM)) { + kvmppc_trigger_fac_interrupt(vcpu, FSCR_TM_LG); + emulated = EMULATE_AGAIN; + break; + } + + if (!(kvmppc_get_msr(vcpu) & MSR_PR)) { + preempt_disable(); + vcpu->arch.cr = (CR0_TBEGIN_FAILURE | + (vcpu->arch.cr & ~(CR0_MASK << CR0_SHIFT))); + + vcpu->arch.texasr = (TEXASR_FS | TEXASR_EXACT | + (((u64)(TM_CAUSE_EMULATE | TM_CAUSE_PERSISTENT)) + << TEXASR_FC_LG)); + + if ((inst >> 21) & 0x1) + vcpu->arch.texasr |= TEXASR_ROT; + + if (kvmppc_get_msr(vcpu) & MSR_HV) + vcpu->arch.texasr |= TEXASR_HV; + + vcpu->arch.tfhar = kvmppc_get_pc(vcpu) + 4; + vcpu->arch.tfiar = kvmppc_get_pc(vcpu); + + kvmppc_restore_tm_sprs(vcpu); + preempt_enable(); + } else + emulated = EMULATE_FAIL; + break; + } +#endif default: emulated = EMULATE_FAIL; } diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c index e8e7f3a..9becca1 100644 --- a/arch/powerpc/kvm/book3s_pr.c +++ b/arch/powerpc/kvm/book3s_pr.c @@ -207,6 +207,15 @@ static void kvmppc_recalc_shadow_msr(struct kvm_vcpu *vcpu) #ifdef CONFIG_PPC_BOOK3S_64 smsr |= MSR_ISF | MSR_HV; #endif +#ifdef CONFIG_PPC_TRANSACTIONAL_MEM + /* + * in guest privileged state, we want to fail all TM transactions. + * So disable MSR TM bit so that all tbegin. will be able to be + * trapped into host. + */ + if (!(guest_msr & MSR_PR)) + smsr &= ~MSR_TM; +#endif vcpu->arch.shadow_msr = smsr; } @@ -299,7 +308,7 @@ static inline void kvmppc_save_tm_sprs(struct kvm_vcpu *vcpu) tm_disable(); } -static inline void kvmppc_restore_tm_sprs(struct kvm_vcpu *vcpu) +void kvmppc_restore_tm_sprs(struct kvm_vcpu *vcpu) { tm_enable(); mtspr(SPRN_TFHAR, vcpu->arch.tfhar);