| Message ID | 1477975263-29045-2-git-send-email-sjitindarsingh@gmail.com |
|---|---|
| State | Superseded |
| Headers | show |
Suraj Jitindar Singh <sjitindarsingh@gmail.com> writes: > ISA 3.00 adds the logical PVR value 0x0f000005, so add a definition for > this. > > Define PCR_ARCH_207 to reflect ISA 2.07 compatibility mode in the processor > compatibility register (PCR). Also define a dummy ISA 3.00 compatibility > mode PCR_ARCH_300 to be used in the next patch to help with determining the > PCR value. What's "dummy" about the PCR value? AFAICS that value is reserved in the ISA. Are we assuming/hoping that ISA 4.0 will use 0x10 to mean ISA 3.0 ? cheers -- To unsubscribe from this list: send the line "unsubscribe kvm-ppc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Tue, 2016-11-08 at 19:21 +1100, Michael Ellerman wrote: > Suraj Jitindar Singh <sjitindarsingh@gmail.com> writes: > > > > > ISA 3.00 adds the logical PVR value 0x0f000005, so add a definition > > for > > this. > > > > Define PCR_ARCH_207 to reflect ISA 2.07 compatibility mode in the > > processor > > compatibility register (PCR). Also define a dummy ISA 3.00 > > compatibility > > mode PCR_ARCH_300 to be used in the next patch to help with > > determining the > > PCR value. > What's "dummy" about the PCR value? Then next patch needs some PCR bit to specify that we want to emulate v3.00 and/or that the host can emulate v3.00 to follow the pattern used to determine that the host is capable of emulating the given compat level and for determining which PCR bits to set. But no such bit is defined for V3.00 compat mode yet so a "dummy" one is used to represent this even though it's never defined in the ISA. > > AFAICS that value is reserved in the ISA. Yes it is a reserved bit in the PCR register but it will never actually be set, it will always be cleared by "host_pcr_bit - guest_pcr_bit;" > > Are we assuming/hoping that ISA 4.0 will use 0x10 to mean ISA 3.0 ? Basically yes, and although I know nothing's given, it would follow the current pattern for whatever the next ISA version is to use 0x10 to mean V3.00 compat mode. Otherwise this will need to be updated at some point when that's released... In fact if the compat bits are no longer sequential this will need rewriting. > > cheers -- To unsubscribe from this list: send the line "unsubscribe kvm-ppc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Suraj Jitindar Singh <sjitindarsingh@gmail.com> writes: > On Tue, 2016-11-08 at 19:21 +1100, Michael Ellerman wrote: >> Suraj Jitindar Singh <sjitindarsingh@gmail.com> writes: >> >> > >> > ISA 3.00 adds the logical PVR value 0x0f000005, so add a definition >> > for >> > this. >> > >> > Define PCR_ARCH_207 to reflect ISA 2.07 compatibility mode in the >> > processor >> > compatibility register (PCR). Also define a dummy ISA 3.00 >> > compatibility >> > mode PCR_ARCH_300 to be used in the next patch to help with >> > determining the >> > PCR value. >> What's "dummy" about the PCR value? > Then next patch needs some PCR bit to specify that we want to emulate > v3.00 and/or that the host can emulate v3.00 to follow the pattern used > to determine that the host is capable of emulating the given compat > level and for determining which PCR bits to set. But no such bit is > defined for V3.00 compat mode yet so a "dummy" one is used to represent > this even though it's never defined in the ISA. >> >> AFAICS that value is reserved in the ISA. > Yes it is a reserved bit in the PCR register but it will never actually > be set, it will always be cleared by "host_pcr_bit - guest_pcr_bit;" >> >> Are we assuming/hoping that ISA 4.0 will use 0x10 to mean ISA 3.0 ? > Basically yes, and although I know nothing's given, it would follow the > current pattern for whatever the next ISA version is to use 0x10 to > mean V3.00 compat mode. Otherwise this will need to be updated at some > point when that's released... In fact if the compat bits are no longer > sequential this will need rewriting. OK thanks. Please send a v4 with that detail in a comment and a better explanation in the change log. I think a block comment before the #define would be best, ie. something like: #define PCR_ARCH_207 0x8 /* Architecture 2.07 */ /* * All that helpful detail from above ... */ #define PCR_ARCH_300 0x10 We should also ask if we can get 0x10 reserved in the ISA to mean 3.00. cheers -- To unsubscribe from this list: send the line "unsubscribe kvm-ppc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Thu, 2016-11-10 at 21:36 +1100, Michael Ellerman wrote: > Suraj Jitindar Singh <sjitindarsingh@gmail.com> writes: > > > > > On Tue, 2016-11-08 at 19:21 +1100, Michael Ellerman wrote: > > > > > > Suraj Jitindar Singh <sjitindarsingh@gmail.com> writes: > > > > > > > > > > > > > > > ISA 3.00 adds the logical PVR value 0x0f000005, so add a > > > > definition > > > > for > > > > this. > > > > > > > > Define PCR_ARCH_207 to reflect ISA 2.07 compatibility mode in > > > > the > > > > processor > > > > compatibility register (PCR). Also define a dummy ISA 3.00 > > > > compatibility > > > > mode PCR_ARCH_300 to be used in the next patch to help with > > > > determining the > > > > PCR value. > > > What's "dummy" about the PCR value? > > > > Then next patch needs some PCR bit to specify that we want to > > emulate > > v3.00 and/or that the host can emulate v3.00 to follow the pattern > > used > > to determine that the host is capable of emulating the given compat > > level and for determining which PCR bits to set. But no such bit is > > defined for V3.00 compat mode yet so a "dummy" one is used to > > represent > > this even though it's never defined in the ISA. > > > > > > > > > AFAICS that value is reserved in the ISA. > > > > Yes it is a reserved bit in the PCR register but it will never > > actually > > be set, it will always be cleared by "host_pcr_bit - > > guest_pcr_bit;" > > > > > > > > > > > Are we assuming/hoping that ISA 4.0 will use 0x10 to mean ISA 3.0 > > > ? > > > > Basically yes, and although I know nothing's given, it would follow > > the > > current pattern for whatever the next ISA version is to use 0x10 to > > mean V3.00 compat mode. Otherwise this will need to be updated at > > some > > point when that's released... In fact if the compat bits are no > > longer > > sequential this will need rewriting. > > OK thanks. > > Please send a v4 with that detail in a comment and a better > explanation > in the change log. > > I think a block comment before the #define would be best, ie. > something Will do and send a V4 > like: > > #define PCR_ARCH_207 0x8 /* Architecture 2.07 > */ > > /* > * All that helpful detail from above ... > */ > #define PCR_ARCH_300 0x10 > > > We should also ask if we can get 0x10 reserved in the ISA to mean > 3.00. Probably a good idea, might ask you about the process for this on Monday... > > cheers -- To unsubscribe from this list: send the line "unsubscribe kvm-ppc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h index 9cd4e8c..3fb6192 100644 --- a/arch/powerpc/include/asm/reg.h +++ b/arch/powerpc/include/asm/reg.h @@ -377,6 +377,8 @@ #define PCR_VEC_DIS (1ul << (63-0)) /* Vec. disable (bit NA since POWER8) */ #define PCR_VSX_DIS (1ul << (63-1)) /* VSX disable (bit NA since POWER8) */ #define PCR_TM_DIS (1ul << (63-2)) /* Trans. memory disable (POWER8) */ +#define PCR_ARCH_300 0x10 /* Dummy Architecture 3.00 */ +#define PCR_ARCH_207 0x8 /* Architecture 2.07 */ #define PCR_ARCH_206 0x4 /* Architecture 2.06 */ #define PCR_ARCH_205 0x2 /* Architecture 2.05 */ #define SPRN_HEIR 0x153 /* Hypervisor Emulated Instruction Register */ @@ -1218,6 +1220,7 @@ #define PVR_ARCH_206 0x0f000003 #define PVR_ARCH_206p 0x0f100003 #define PVR_ARCH_207 0x0f000004 +#define PVR_ARCH_300 0x0f000005 /* Macros for setting and retrieving special purpose registers */ #ifndef __ASSEMBLY__
ISA 3.00 adds the logical PVR value 0x0f000005, so add a definition for this. Define PCR_ARCH_207 to reflect ISA 2.07 compatibility mode in the processor compatibility register (PCR). Also define a dummy ISA 3.00 compatibility mode PCR_ARCH_300 to be used in the next patch to help with determining the PCR value. Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> --- arch/powerpc/include/asm/reg.h | 3 +++ 1 file changed, 3 insertions(+)