From patchwork Thu Oct 27 06:19:28 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suraj Jitindar Singh X-Patchwork-Id: 687457 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3t4GvX2Y3xz9tk9 for ; Thu, 27 Oct 2016 17:19:52 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=Zxy6EJcD; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751373AbcJ0GTw (ORCPT ); Thu, 27 Oct 2016 02:19:52 -0400 Received: from mail-pf0-f193.google.com ([209.85.192.193]:36698 "EHLO mail-pf0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750748AbcJ0GTv (ORCPT ); Thu, 27 Oct 2016 02:19:51 -0400 Received: by mail-pf0-f193.google.com with SMTP id n85so1639798pfi.3 for ; Wed, 26 Oct 2016 23:19:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=HmO6t55Z2RQvrPX10Fro2IpS7vaVtakpxfs0kpp+ghw=; b=Zxy6EJcDwrNgzgwjgzbk78luGIziUR06Imm6c7hySufqN98ifDOa+TMxAFLCPxgjga dFzEixns8azxzbEsnyt7/H2u2z9RQCGE8YEL5fZT4bHhF7ZTapiJpEswE+ygQShJtXH+ AI7cScO5Qp/T93ZD+LFxRMlob1rYtpNm+q1jwwTxIZUm2zhwwjfKxwwEPy/smXDbvonp Q1XrS9D8fV6WJ74vi68toiAdxkxmdLn3DnToGe0H/t7LUF8dAaYjDeWuKyeyAxupPOqc DTERSylXoQIm8V+o33SVgO4eEgUFsSJxFUyIM1ZS0kRY2gwtF6Ldye1YA9Ke2UsC9DVW ny8Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=HmO6t55Z2RQvrPX10Fro2IpS7vaVtakpxfs0kpp+ghw=; b=fstUSeLcfLyhYwBrBCb65aU6eWxyaK3Gj6xHJrn5vAFE2BsiyDIrrSaQMpQRRHsx+q Aoqv8x+EoiEBi/l7mLUB8cXcBnWfhx9stLSf8Ub1wDqGUEe4+cPKHdEVw5qE1T5nHBmA uyk1bw11l3jtJrXJ683coqmkMNh/MbHfhvSwPf/mHlD7qTBIo713wTySEE1Xk4c2uVS8 x+9qWPkXq5kMcB/Gb/B76Rc4Y5Do6c01svE1/SvwN03vGSxw/bBegZeiU70rz7seeBsb cvAzTXGFKFTwmHD29+cfR5px1qqMlVMkG+zgrdjePklA0FNvdafqWfRoytHLi8zNflPO M4lw== X-Gm-Message-State: ABUngvecbOWuYMLm2Hze8UPsCju1Qw/otqy3LY1JqM1Cmj0Zv9Ig2xVeynyPxzWhVWHK6g== X-Received: by 10.98.200.15 with SMTP id z15mr11544415pff.128.1477549190644; Wed, 26 Oct 2016 23:19:50 -0700 (PDT) Received: from dyn253.ozlabs.ibm.com ([122.99.82.10]) by smtp.gmail.com with ESMTPSA id y77sm8374838pfi.69.2016.10.26.23.19.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 26 Oct 2016 23:19:50 -0700 (PDT) From: Suraj Jitindar Singh To: linuxppc-dev@lists.ozlabs.org Cc: kvm-ppc@vger.kernel.org, mpe@ellerman.id.au, benh@kernel.crashing.org, paulus@samba.org, agraf@suse.com, Suraj Jitindar Singh Subject: [PATCH 1/2] powerpc: Define new ISA v3.00 logical PVR value and PCR register value Date: Thu, 27 Oct 2016 17:19:28 +1100 Message-Id: <1477549169-3649-2-git-send-email-sjitindarsingh@gmail.com> X-Mailer: git-send-email 2.5.5 In-Reply-To: <1477549169-3649-1-git-send-email-sjitindarsingh@gmail.com> References: <1477549169-3649-1-git-send-email-sjitindarsingh@gmail.com> Sender: kvm-ppc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm-ppc@vger.kernel.org ISA 3.00 adds the logical PVR value 0x0f000005, so add a definition for this. Define PCR_ARCH_207 to reflect ISA 2.07 compatibility mode in the processor compatibility register (PCR). Signed-off-by: Suraj Jitindar Singh --- arch/powerpc/include/asm/reg.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h index 9cd4e8c..74c8079 100644 --- a/arch/powerpc/include/asm/reg.h +++ b/arch/powerpc/include/asm/reg.h @@ -377,6 +377,7 @@ #define PCR_VEC_DIS (1ul << (63-0)) /* Vec. disable (bit NA since POWER8) */ #define PCR_VSX_DIS (1ul << (63-1)) /* VSX disable (bit NA since POWER8) */ #define PCR_TM_DIS (1ul << (63-2)) /* Trans. memory disable (POWER8) */ +#define PCR_ARCH_207 0x8 /* Architecture 2.07 */ #define PCR_ARCH_206 0x4 /* Architecture 2.06 */ #define PCR_ARCH_205 0x2 /* Architecture 2.05 */ #define SPRN_HEIR 0x153 /* Hypervisor Emulated Instruction Register */ @@ -1218,6 +1219,7 @@ #define PVR_ARCH_206 0x0f000003 #define PVR_ARCH_206p 0x0f100003 #define PVR_ARCH_207 0x0f000004 +#define PVR_ARCH_300 0x0f000005 /* Macros for setting and retrieving special purpose registers */ #ifndef __ASSEMBLY__