From patchwork Wed Mar 2 20:19:20 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Huth X-Patchwork-Id: 591111 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id D9FB414159D for ; Thu, 3 Mar 2016 07:19:30 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754680AbcCBUT3 (ORCPT ); Wed, 2 Mar 2016 15:19:29 -0500 Received: from mx1.redhat.com ([209.132.183.28]:44959 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753004AbcCBUT3 (ORCPT ); Wed, 2 Mar 2016 15:19:29 -0500 Received: from int-mx14.intmail.prod.int.phx2.redhat.com (int-mx14.intmail.prod.int.phx2.redhat.com [10.5.11.27]) by mx1.redhat.com (Postfix) with ESMTPS id E0544C0AC934; Wed, 2 Mar 2016 20:19:28 +0000 (UTC) Received: from thh440s.fritz.box (vpn1-4-99.ams2.redhat.com [10.36.4.99]) by int-mx14.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u22KJM3m019229; Wed, 2 Mar 2016 15:19:27 -0500 From: Thomas Huth To: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au, agraf@suse.de Cc: qemu-devel@nongnu.org, benh@kernel.crashing.org, kvm-ppc@vger.kernel.org Subject: [PATCH 1/3] ppc: Define the PSPB register on POWER8 Date: Wed, 2 Mar 2016 21:19:20 +0100 Message-Id: <1456949962-29920-2-git-send-email-thuth@redhat.com> In-Reply-To: <1456949962-29920-1-git-send-email-thuth@redhat.com> References: <1456949962-29920-1-git-send-email-thuth@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.27 Sender: kvm-ppc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm-ppc@vger.kernel.org POWER8 / PowerISA 2.07 has a new special purpose register called PSPB ("Problem State Priority Boost Register"). The contents of this register are currently lost during migration. To be able to migrate this register, too, we've got to define this SPR along with the other SPRs of POWER8. Signed-off-by: Thomas Huth --- target-ppc/cpu.h | 1 + target-ppc/translate_init.c | 9 +++++++++ 2 files changed, 10 insertions(+) diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 2b10597..8fc0fb4 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1380,6 +1380,7 @@ static inline int cpu_mmu_index (CPUPPCState *env, bool ifetch) #define SPR_UAMOR (0x09D) #define SPR_MPC_ICTRL (0x09E) #define SPR_MPC_BAR (0x09F) +#define SPR_PSPB (0x09F) #define SPR_VRSAVE (0x100) #define SPR_USPRG0 (0x100) #define SPR_USPRG1 (0x101) diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index bd0cffc..f72148c 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -7842,6 +7842,14 @@ static void gen_spr_power8_fscr(CPUPPCState *env) KVM_REG_PPC_FSCR, initval); } +static void gen_spr_power8_pspb(CPUPPCState *env) +{ + spr_register_kvm(env, SPR_PSPB, "PSPB", + SPR_NOACCESS, SPR_NOACCESS, + &spr_read_generic, &spr_write_generic32, + KVM_REG_PPC_PSPB, 0); +} + static void init_proc_book3s_64(CPUPPCState *env, int version) { gen_spr_ne_601(env); @@ -7892,6 +7900,7 @@ static void init_proc_book3s_64(CPUPPCState *env, int version) gen_spr_power8_pmu_sup(env); gen_spr_power8_pmu_user(env); gen_spr_power8_tm(env); + gen_spr_power8_pspb(env); gen_spr_vtb(env); } if (version < BOOK3S_CPU_POWER8) {