From patchwork Sun May 6 14:20:47 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Graf X-Patchwork-Id: 157076 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 07636B6FC2 for ; Mon, 7 May 2012 00:21:40 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753841Ab2EFOVi (ORCPT ); Sun, 6 May 2012 10:21:38 -0400 Received: from cantor2.suse.de ([195.135.220.15]:51749 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753134Ab2EFOVD (ORCPT ); Sun, 6 May 2012 10:21:03 -0400 Received: from relay2.suse.de (unknown [195.135.220.254]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx2.suse.de (Postfix) with ESMTP id 58023A3DF4; Sun, 6 May 2012 16:21:01 +0200 (CEST) From: Alexander Graf To: kvm-ppc Cc: kvm list , Avi Kivity , Varun Sethi Subject: [PATCH 03/16] KVM: PPC: bookehv: Use a Macro for saving/restoring guest registers to/from their 64 bit copies. Date: Sun, 6 May 2012 16:20:47 +0200 Message-Id: <1336314060-32640-4-git-send-email-agraf@suse.de> X-Mailer: git-send-email 1.6.0.2 In-Reply-To: <1336314060-32640-1-git-send-email-agraf@suse.de> References: <1336314060-32640-1-git-send-email-agraf@suse.de> Sender: kvm-ppc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm-ppc@vger.kernel.org From: Varun Sethi Introduced PPC_STD/PPC_LD macros for saving/restoring guest registers to/from their 64 bit copies. Signed-off-by: Varun Sethi Signed-off-by: Alexander Graf --- arch/powerpc/include/asm/kvm_asm.h | 8 ++++++++ arch/powerpc/kvm/bookehv_interrupts.S | 24 ++++-------------------- 2 files changed, 12 insertions(+), 20 deletions(-) diff --git a/arch/powerpc/include/asm/kvm_asm.h b/arch/powerpc/include/asm/kvm_asm.h index 0978152..7d4018d 100644 --- a/arch/powerpc/include/asm/kvm_asm.h +++ b/arch/powerpc/include/asm/kvm_asm.h @@ -20,6 +20,14 @@ #ifndef __POWERPC_KVM_ASM_H__ #define __POWERPC_KVM_ASM_H__ +#ifdef CONFIG_64BIT +#define PPC_STD(sreg, offset, areg) std sreg, (offset)(areg) +#define PPC_LD(treg, offset, areg) ld treg, (offset)(areg) +#else +#define PPC_STD(sreg, offset, areg) stw sreg, (offset+4)(areg) +#define PPC_LD(treg, offset, areg) lwz treg, (offset+4)(areg) +#endif + /* IVPR must be 64KiB-aligned. */ #define VCPU_SIZE_ORDER 4 #define VCPU_SIZE_LOG (VCPU_SIZE_ORDER + 12) diff --git a/arch/powerpc/kvm/bookehv_interrupts.S b/arch/powerpc/kvm/bookehv_interrupts.S index 909e96e..41d3485 100644 --- a/arch/powerpc/kvm/bookehv_interrupts.S +++ b/arch/powerpc/kvm/bookehv_interrupts.S @@ -93,11 +93,7 @@ #endif oris r8, r6, MSR_CE@h -#ifdef CONFIG_64BIT - std r6, (VCPU_SHARED_MSR)(r11) -#else - stw r6, (VCPU_SHARED_MSR + 4)(r11) -#endif + PPC_STD(r6, VCPU_SHARED_MSR, r11) ori r8, r8, MSR_ME | MSR_RI PPC_STL r5, VCPU_PC(r4) @@ -335,11 +331,7 @@ _GLOBAL(kvmppc_resume_host) stw r5, VCPU_SHARED_MAS0(r11) mfspr r7, SPRN_MAS2 stw r6, VCPU_SHARED_MAS1(r11) -#ifdef CONFIG_64BIT - std r7, (VCPU_SHARED_MAS2)(r11) -#else - stw r7, (VCPU_SHARED_MAS2 + 4)(r11) -#endif + PPC_STD(r7, VCPU_SHARED_MAS2, r11) mfspr r5, SPRN_MAS3 mfspr r6, SPRN_MAS4 stw r5, VCPU_SHARED_MAS7_3+4(r11) @@ -527,11 +519,7 @@ lightweight_exit: stw r3, VCPU_HOST_MAS6(r4) lwz r3, VCPU_SHARED_MAS0(r11) lwz r5, VCPU_SHARED_MAS1(r11) -#ifdef CONFIG_64BIT - ld r6, (VCPU_SHARED_MAS2)(r11) -#else - lwz r6, (VCPU_SHARED_MAS2 + 4)(r11) -#endif + PPC_LD(r6, VCPU_SHARED_MAS2, r11) lwz r7, VCPU_SHARED_MAS7_3+4(r11) lwz r8, VCPU_SHARED_MAS4(r11) mtspr SPRN_MAS0, r3 @@ -565,11 +553,7 @@ lightweight_exit: PPC_LL r6, VCPU_CTR(r4) PPC_LL r7, VCPU_CR(r4) PPC_LL r8, VCPU_PC(r4) -#ifdef CONFIG_64BIT - ld r9, (VCPU_SHARED_MSR)(r11) -#else - lwz r9, (VCPU_SHARED_MSR + 4)(r11) -#endif + PPC_LD(r9, VCPU_SHARED_MSR, r11) PPC_LL r0, VCPU_GPR(r0)(r4) PPC_LL r1, VCPU_GPR(r1)(r4) PPC_LL r2, VCPU_GPR(r2)(r4)