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[00/11] KVM: PPC: reconstruct mmio emulation with analyse_instr()

Message ID 1524657284-16706-1-git-send-email-wei.guo.simon@gmail.com
Headers show
Series KVM: PPC: reconstruct mmio emulation with analyse_instr() | expand

Message

Simon Guo April 25, 2018, 11:54 a.m. UTC
From: Simon Guo <wei.guo.simon@gmail.com>

We already have analyse_instr() which analyzes instructions for the instruction
type, size, addtional flags, etc. What kvmppc_emulate_loadstore() did is somehow
duplicated and it will be good to utilize analyse_instr() to reconstruct the
code. The advantage is that the code logic will be shared and more clean to be 
maintained.

This patch series reconstructs kvmppc_emulate_loadstore() for various load/store
instructions. 

The testcase locates at:
https://github.com/justdoitqd/publicFiles/blob/master/test_mmio.c

- Tested at both PR/HV KVM. 
- Also tested with little endian host & big endian guest.

Tested instruction list: 
	lbz lbzu lbzx ld ldbrx
	ldu ldx lfd lfdu lfdx
	lfiwax lfiwzx lfs lfsu lfsx
	lha lhau lhax lhbrx lhz
	lhzu lhzx lvx lwax lwbrx
	lwz lwzu lwzx lxsdx lxsiwax
	lxsiwzx lxsspx lxvd2x lxvdsx lxvw4x
	stb stbu stbx std stdbrx
	stdu stdx stfd stfdu stfdx
	stfiwx stfs stfsx sth sthbrx
	sthu sthx stvx stw stwbrx
	stwu stwx stxsdx stxsiwx stxsspx
	stxvd2x stxvw4x

Simon Guo (11):
  KVM: PPC: add pt_regs into kvm_vcpu_arch and move vcpu->arch.gpr[]
    into it
  KVM: PPC: mov nip/ctr/lr/xer registers to pt_regs in kvm_vcpu_arch
  KVM: PPC: Fix a mmio_host_swabbed uninitialized usage issue when VMX
    store
  KVM: PPC: fix incorrect element_size for stxsiwx in analyse_instr
  KVM: PPC: add GPR RA update skeleton for MMIO emulation
  KVM: PPC: add KVMPPC_VSX_COPY_WORD_LOAD_DUMP type support for mmio
    emulation
  KVM: PPC: reconstruct non-SIMD LOAD/STORE instruction mmio emulation
    with analyse_intr() input
  KVM: PPC: add giveup_ext() hook for PPC KVM ops
  KVM: PPC: reconstruct LOAD_FP/STORE_FP instruction mmio emulation with
    analyse_intr() input
  KVM: PPC: reconstruct LOAD_VMX/STORE_VMX instruction mmio emulation
    with analyse_intr() input
  KVM: PPC: reconstruct LOAD_VSX/STORE_VSX instruction mmio emulation
    with analyse_intr() input

 arch/powerpc/include/asm/kvm_book3s.h    |  20 +-
 arch/powerpc/include/asm/kvm_book3s_64.h |  20 +-
 arch/powerpc/include/asm/kvm_booke.h     |  20 +-
 arch/powerpc/include/asm/kvm_host.h      |   9 +-
 arch/powerpc/include/asm/kvm_ppc.h       |   2 +
 arch/powerpc/include/asm/sstep.h         |   2 +-
 arch/powerpc/kernel/asm-offsets.c        |  22 +-
 arch/powerpc/kvm/book3s_32_mmu.c         |   2 +-
 arch/powerpc/kvm/book3s_64_vio_hv.c      |   2 +-
 arch/powerpc/kvm/book3s_hv.c             |  11 +-
 arch/powerpc/kvm/book3s_hv_builtin.c     |   6 +-
 arch/powerpc/kvm/book3s_hv_rm_mmu.c      |  15 +-
 arch/powerpc/kvm/book3s_hv_rm_xics.c     |   2 +-
 arch/powerpc/kvm/book3s_hv_tm.c          |  10 +-
 arch/powerpc/kvm/book3s_hv_tm_builtin.c  |  10 +-
 arch/powerpc/kvm/book3s_pr.c             |  73 +--
 arch/powerpc/kvm/book3s_xive_template.c  |   4 +-
 arch/powerpc/kvm/booke.c                 |  41 +-
 arch/powerpc/kvm/booke_emulate.c         |   6 +-
 arch/powerpc/kvm/e500_emulate.c          |   6 +-
 arch/powerpc/kvm/e500_mmu.c              |   2 +-
 arch/powerpc/kvm/emulate_loadstore.c     | 734 +++++++++----------------------
 arch/powerpc/kvm/powerpc.c               |  53 ++-
 arch/powerpc/lib/sstep.c                 |   2 +-
 24 files changed, 407 insertions(+), 667 deletions(-)

Comments

Paul Mackerras May 3, 2018, 5:31 a.m. UTC | #1
On Wed, Apr 25, 2018 at 07:54:33PM +0800, wei.guo.simon@gmail.com wrote:
> From: Simon Guo <wei.guo.simon@gmail.com>
> 
> We already have analyse_instr() which analyzes instructions for the instruction
> type, size, addtional flags, etc. What kvmppc_emulate_loadstore() did is somehow
> duplicated and it will be good to utilize analyse_instr() to reconstruct the
> code. The advantage is that the code logic will be shared and more clean to be 
> maintained.
> 
> This patch series reconstructs kvmppc_emulate_loadstore() for various load/store
> instructions. 
> 
> The testcase locates at:
> https://github.com/justdoitqd/publicFiles/blob/master/test_mmio.c
> 
> - Tested at both PR/HV KVM. 
> - Also tested with little endian host & big endian guest.
> 
> Tested instruction list: 
> 	lbz lbzu lbzx ld ldbrx
> 	ldu ldx lfd lfdu lfdx
> 	lfiwax lfiwzx lfs lfsu lfsx
> 	lha lhau lhax lhbrx lhz
> 	lhzu lhzx lvx lwax lwbrx
> 	lwz lwzu lwzx lxsdx lxsiwax
> 	lxsiwzx lxsspx lxvd2x lxvdsx lxvw4x
> 	stb stbu stbx std stdbrx
> 	stdu stdx stfd stfdu stfdx
> 	stfiwx stfs stfsx sth sthbrx
> 	sthu sthx stvx stw stwbrx
> 	stwu stwx stxsdx stxsiwx stxsspx
> 	stxvd2x stxvw4x

Thanks for doing this.  It's nice to see that this makes the code 260
lines smaller.

I have some comments on the individual patches, which I will give in
replies to those patches.

Paul.
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Simon Guo May 3, 2018, 7:41 a.m. UTC | #2
On Thu, May 03, 2018 at 03:31:17PM +1000, Paul Mackerras wrote:
> On Wed, Apr 25, 2018 at 07:54:33PM +0800, wei.guo.simon@gmail.com wrote:
> > From: Simon Guo <wei.guo.simon@gmail.com>
> > 
> > We already have analyse_instr() which analyzes instructions for the instruction
> > type, size, addtional flags, etc. What kvmppc_emulate_loadstore() did is somehow
> > duplicated and it will be good to utilize analyse_instr() to reconstruct the
> > code. The advantage is that the code logic will be shared and more clean to be 
> > maintained.
> > 
> > This patch series reconstructs kvmppc_emulate_loadstore() for various load/store
> > instructions. 
> > 
> > The testcase locates at:
> > https://github.com/justdoitqd/publicFiles/blob/master/test_mmio.c
> > 
> > - Tested at both PR/HV KVM. 
> > - Also tested with little endian host & big endian guest.
> > 
> > Tested instruction list: 
> > 	lbz lbzu lbzx ld ldbrx
> > 	ldu ldx lfd lfdu lfdx
> > 	lfiwax lfiwzx lfs lfsu lfsx
> > 	lha lhau lhax lhbrx lhz
> > 	lhzu lhzx lvx lwax lwbrx
> > 	lwz lwzu lwzx lxsdx lxsiwax
> > 	lxsiwzx lxsspx lxvd2x lxvdsx lxvw4x
> > 	stb stbu stbx std stdbrx
> > 	stdu stdx stfd stfdu stfdx
> > 	stfiwx stfs stfsx sth sthbrx
> > 	sthu sthx stvx stw stwbrx
> > 	stwu stwx stxsdx stxsiwx stxsspx
> > 	stxvd2x stxvw4x
> 
> Thanks for doing this.  It's nice to see that this makes the code 260
> lines smaller.
> 
> I have some comments on the individual patches, which I will give in
> replies to those patches.
> 
> Paul.
Thanks for those good comment. I will check them.

BR,
- Simon
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