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Sat, 9 Dec 2023 17:07:56 +0000 (UTC) DKIM-Filter: OpenDKIM Filter v2.11.0 smtp1.osuosl.org AFD79814B1 X-IronPort-AV: E=McAfee;i="6600,9927,10919"; a="458833652" X-IronPort-AV: E=Sophos;i="6.04,264,1695711600"; d="scan'208";a="458833652" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Dec 2023 09:07:55 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.04,264,1695711600"; d="scan'208";a="20455610" Received: from ccdlinuxdev11.iil.intel.com ([143.185.160.232]) by orviesa001.jf.intel.com with ESMTP; 09 Dec 2023 09:07:54 -0800 From: Sasha Neftin To: intel-wired-lan@lists.osuosl.org Date: Sat, 9 Dec 2023 19:07:53 +0200 Message-Id: <20231209170753.168989-1-sasha.neftin@intel.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1702141676; x=1733677676; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=CSTjm2L8ZvHcFsg/Ofaa0H6lBSvPaETcgpslOwcFg1o=; b=VYB85t8kZbI2b/Gj/+bIYPyOmPNg7ZNriSkUzED52uCxSXg20DBYFNfD hBleCjpO2jp1OgHV03+1reB6gaPRSFG/mMkGhJnnwdISNCgDtvqqvjXlX Lia7u9NT8gTHOTY3mEpSWTReFPui5S7JbkmZmFHzq3EeAR8j7/PWXlJsg ODpUFfeMbGcULh5nARKwXNy6H5iajf+Z9kP/mHphKDwAYvviPUrF9r0iU Q0fvLuL0I6r0iyOr5egfLZOrUMZQEp3QR0NiMqFKzpbkO0zheUofEilDg yIBA3e32Pm74wGb76scdxYRBgLDrVgp3P8vVucA2X9eC18HQFGUvLmrPN Q==; X-Mailman-Original-Authentication-Results: smtp1.osuosl.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=VYB85t8k Subject: [Intel-wired-lan] [PATCH iwl-net v1 1/1] e1000e: Correct the maximum frequency adjustment X-BeenThere: intel-wired-lan@osuosl.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Wired Ethernet Linux Kernel Driver Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sasha Neftin Errors-To: intel-wired-lan-bounces@osuosl.org Sender: "Intel-wired-lan" The latest Intel platform used two clocks for 1588 time synchronization dependent on the HW strap: 24 MHz and 38.4 MHz. The maximum possible frequency adjustment, in parts per billion, calculated as follows: max ppb = ((MAX_INCVAL – BASE_INCVAL)*1billion) / BASE_INCVAL. Where MAX_INCVAL is TIMINCA resolution (2^24 -1) and BASE_INCVAL is depends on the clock. For 24 MHz the max ppb value should be 600,000,000 and for the 38.4MHz the max ppb value is 230,000,000. Reported-by: Trey Harrison Fixes: d89777bf0e42 ("e1000e: add support for IEEE-1588 PTP") Reviewed-by: Jacob Keller Signed-off-by: Sasha Neftin --- drivers/net/ethernet/intel/e1000e/ptp.c | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/drivers/net/ethernet/intel/e1000e/ptp.c b/drivers/net/ethernet/intel/e1000e/ptp.c index 02d871bc112a..792dfe602ca0 100644 --- a/drivers/net/ethernet/intel/e1000e/ptp.c +++ b/drivers/net/ethernet/intel/e1000e/ptp.c @@ -283,17 +283,24 @@ void e1000e_ptp_init(struct e1000_adapter *adapter) case e1000_pch_lpt: case e1000_pch_spt: case e1000_pch_cnp: + if (hw->mac.type < e1000_pch_lpt || + (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI)) { + adapter->ptp_clock_info.max_adj = 24000000 - 1; + break; + } + fallthrough; case e1000_pch_tgp: case e1000_pch_adp: case e1000_pch_mtp: case e1000_pch_lnp: case e1000_pch_ptp: case e1000_pch_nvp: - if ((hw->mac.type < e1000_pch_lpt) || - (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI)) { - adapter->ptp_clock_info.max_adj = 24000000 - 1; - break; - } + if (hw->mac.type < e1000_pch_lpt || + (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI)) + adapter->ptp_clock_info.max_adj = 600000000 - 1; + else + adapter->ptp_clock_info.max_adj = 230000000 - 1; + break; fallthrough; case e1000_82574: case e1000_82583: