From patchwork Thu Mar 24 23:22:55 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Rustad, Mark D" X-Patchwork-Id: 601852 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from hemlock.osuosl.org (smtp2.osuosl.org [140.211.166.133]) by ozlabs.org (Postfix) with ESMTP id 3qWMtC6KGGz9s9Z for ; Fri, 25 Mar 2016 10:22:59 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by hemlock.osuosl.org (Postfix) with ESMTP id 337C5956F6; Thu, 24 Mar 2016 23:22:59 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from hemlock.osuosl.org ([127.0.0.1]) by localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Vh-p+l7a1k2Q; Thu, 24 Mar 2016 23:22:58 +0000 (UTC) Received: from ash.osuosl.org (ash.osuosl.org [140.211.166.34]) by hemlock.osuosl.org (Postfix) with ESMTP id AF5B595750; Thu, 24 Mar 2016 23:22:58 +0000 (UTC) X-Original-To: intel-wired-lan@lists.osuosl.org Delivered-To: intel-wired-lan@lists.osuosl.org Received: from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138]) by ash.osuosl.org (Postfix) with ESMTP id 5BC7D1C0E10 for ; Thu, 24 Mar 2016 23:22:57 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by whitealder.osuosl.org (Postfix) with ESMTP id 56FBE910F0 for ; Thu, 24 Mar 2016 23:22:57 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from whitealder.osuosl.org ([127.0.0.1]) by localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Xeg42t-ZhreY for ; Thu, 24 Mar 2016 23:22:56 +0000 (UTC) X-Greylist: domain auto-whitelisted by SQLgrey-1.7.6 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by whitealder.osuosl.org (Postfix) with ESMTP id A1DF290F82 for ; Thu, 24 Mar 2016 23:22:56 +0000 (UTC) Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga101.jf.intel.com with ESMTP; 24 Mar 2016 16:22:57 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,387,1455004800"; d="scan'208";a="72812651" Received: from mdrustad-wks.jf.intel.com ([134.134.3.71]) by fmsmga004.fm.intel.com with ESMTP; 24 Mar 2016 16:22:55 -0700 From: Mark D Rustad To: intel-wired-lan@lists.osuosl.org Date: Thu, 24 Mar 2016 16:22:55 -0700 Message-ID: <20160324232255.108409.94964.stgit@mdrustad-wks.jf.intel.com> In-Reply-To: <20160324231833.108409.65944.stgit@mdrustad-wks.jf.intel.com> References: <20160324231833.108409.65944.stgit@mdrustad-wks.jf.intel.com> User-Agent: StGit/unknown-version MIME-Version: 1.0 Subject: [Intel-wired-lan] [PATCH 04/11] ixgbe: Request token for PHY accesses X-BeenThere: intel-wired-lan@lists.osuosl.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: Intel Wired Ethernet Linux Kernel Driver Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-wired-lan-bounces@lists.osuosl.org Sender: "Intel-wired-lan" Set the bit to request the PHY token for PHY accesses. Signed-off-by: Mark Rustad --- drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c | 34 +++++++++++++------------- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c index db0731e05401..9092b9612271 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c @@ -1,7 +1,7 @@ /******************************************************************************* Intel 10 Gigabit PCI Express Linux driver - Copyright(c) 1999 - 2014 Intel Corporation. + Copyright(c) 1999 - 2016 Intel Corporation. This program is free software; you can redistribute it and/or modify it under the terms and conditions of the GNU General Public License, @@ -570,24 +570,24 @@ s32 ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, /** * ixgbe_read_phy_reg_generic - Reads a value from a specified PHY register - * using the SWFW lock - this function is needed in most cases * @hw: pointer to hardware structure * @reg_addr: 32 bit address of PHY register to read * @phy_data: Pointer to read data from PHY register + * + * This function uses the SWFW lock which must be held for all accesses **/ s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, u16 *phy_data) { + u32 gssr = hw->phy.phy_semaphore_mask | IXGBE_GSSR_TOKEN_SM; s32 status; - u32 gssr = hw->phy.phy_semaphore_mask; - if (hw->mac.ops.acquire_swfw_sync(hw, gssr) == 0) { - status = ixgbe_read_phy_reg_mdi(hw, reg_addr, device_type, - phy_data); - hw->mac.ops.release_swfw_sync(hw, gssr); - } else { + if (hw->mac.ops.acquire_swfw_sync(hw, gssr)) return IXGBE_ERR_SWFW_SYNC; - } + + status = hw->phy.ops.read_reg_mdi(hw, reg_addr, device_type, phy_data); + + hw->mac.ops.release_swfw_sync(hw, gssr); return status; } @@ -667,25 +667,25 @@ s32 ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, /** * ixgbe_write_phy_reg_generic - Writes a value to specified PHY register - * using SWFW lock- this function is needed in most cases * @hw: pointer to hardware structure * @reg_addr: 32 bit PHY register to write * @device_type: 5 bit device type * @phy_data: Data to write to the PHY register + * + * This function uses the SWFW lock which must be held for all accesses **/ s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, u16 phy_data) { + u32 gssr = hw->phy.phy_semaphore_mask | IXGBE_GSSR_TOKEN_SM; s32 status; - u32 gssr = hw->phy.phy_semaphore_mask; - if (hw->mac.ops.acquire_swfw_sync(hw, gssr) == 0) { - status = ixgbe_write_phy_reg_mdi(hw, reg_addr, device_type, - phy_data); - hw->mac.ops.release_swfw_sync(hw, gssr); - } else { + if (hw->mac.ops.acquire_swfw_sync(hw, gssr)) return IXGBE_ERR_SWFW_SYNC; - } + + status = hw->phy.ops.write_reg_mdi(hw, reg_addr, device_type, phy_data); + + hw->mac.ops.release_swfw_sync(hw, gssr); return status; }