diff mbox series

[v3,3/3] aarch64: Enhanced CPU diagnostics for ld.so

Message ID ddf8aad3798c861d5b8916c309135a90bf655ff3.1712312063.git.fweimer@redhat.com
State New
Headers show
Series Enhanced CPU diagnostics for ld.so | expand

Commit Message

Florian Weimer April 5, 2024, 10:16 a.m. UTC
This prints some information from struct cpu_features, and the midr_el1
and dczid_el0 system register contents on every CPU.
---
 manual/dynlink.texi                  | 34 +++++++++++
 sysdeps/aarch64/dl-diagnostics-cpu.c | 84 ++++++++++++++++++++++++++++
 2 files changed, 118 insertions(+)
 create mode 100644 sysdeps/aarch64/dl-diagnostics-cpu.c

Comments

Adhemerval Zanella April 5, 2024, 1:42 p.m. UTC | #1
On 05/04/24 07:16, Florian Weimer wrote:
> This prints some information from struct cpu_features, and the midr_el1
> and dczid_el0 system register contents on every CPU.
> ---
>  manual/dynlink.texi                  | 34 +++++++++++
>  sysdeps/aarch64/dl-diagnostics-cpu.c | 84 ++++++++++++++++++++++++++++
>  2 files changed, 118 insertions(+)
>  create mode 100644 sysdeps/aarch64/dl-diagnostics-cpu.c
> 
> diff --git a/manual/dynlink.texi b/manual/dynlink.texi
> index f2f2341818..6f4acf321d 100644
> --- a/manual/dynlink.texi
> +++ b/manual/dynlink.texi
> @@ -224,6 +224,40 @@ reflect adjustment by @theglibc{}.
>  These Linux-specific items show the values of @code{struct utsname}, as
>  reported by the @code{uname} function.  @xref{Platform Type}.
>  
> +@item aarch64.cpu_features.@dots{}
> +These items are specific to the AArch64 architectures.  They report data
> +that is used by @theglibc{} to select alternative function
> +implementations.

Maybe also add some options are security related and not really tied
to ifunc support (mte, bti).

> +
> +@item aarch64.processor[@var{index}].@dots{}
> +These are additional items for the AArch64 architecture and are
> +described below.
> +
> +@item aarch64.processor[@var{index}].requested=@var{kernel-cpu}
> +The kernel is told to run the subsequent probing on the CPU numbered
> +@var{kernel-cpu}.  The values @var{kernel-cpu} and @var{index} can be
> +distinct if there are gaps in the process CPU affinity mask.  This line
> +is not included if CPU affinity mask information is not available.
> +
> +@item aarch64.processor[@var{index}].observed=@var{kernel-cpu}
> +This line reports the kernel CPU number @var{kernel-cpu} on which the
> +probing code initially ran.  If the CPU number cannot be obtained,
> +this line is not printed.
> +
> +@item aarch64.processor[@var{index}].observed_node=@var{node}
> +This reports the observed NUMA node number, as reported by the
> +@code{getcpu} system call.  If this information cannot be obtained, this
> +line is not printed.
> +
> +@item aarch64.processor[@var{index}].midr_el1=@var{value}
> +The value of the @code{midr_el1} system register on the processor
> +@var{index}.  This line is only printed if the kernel indicates that
> +this system register is supported.
> +
> +@item aarch64.processor[@var{index}].dczid_el0=@var{value}
> +The value of the @code{dczid_el0} system register on the processor
> +@var{index}.
> +
>  @cindex CPUID (diagnostics)
>  @item x86.cpu_features.@dots{}
>  These items are specific to the i386 and x86-64 architectures.  They
> diff --git a/sysdeps/aarch64/dl-diagnostics-cpu.c b/sysdeps/aarch64/dl-diagnostics-cpu.c
> new file mode 100644
> index 0000000000..e037e6ea8c
> --- /dev/null
> +++ b/sysdeps/aarch64/dl-diagnostics-cpu.c
> @@ -0,0 +1,84 @@
> +/* Print CPU diagnostics data in ld.so.  AArch64 version.
> +   Copyright (C) 2021-2024 Free Software Foundation, Inc.

Maybe just 2024 here.

> +   This file is part of the GNU C Library.
> +
> +   The GNU C Library is free software; you can redistribute it and/or
> +   modify it under the terms of the GNU Lesser General Public
> +   License as published by the Free Software Foundation; either
> +   version 2.1 of the License, or (at your option) any later version.
> +
> +   The GNU C Library is distributed in the hope that it will be useful,
> +   but WITHOUT ANY WARRANTY; without even the implied warranty of
> +   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
> +   Lesser General Public License for more details.
> +
> +   You should have received a copy of the GNU Lesser General Public
> +   License along with the GNU C Library; if not, see
> +   <https://www.gnu.org/licenses/>.  */
> +
> +#include <dl-diagnostics.h>
> +
> +#include <cpu-features.h>
> +#include <dl-iterate_cpu.h>
> +#include <ldsodefs.h>
> +#include <sys/auxv.h>
> +
> +static void
> +print_cpu_features_value (const char *label, uint64_t value)
> +{
> +  _dl_printf ("aarch64.cpu_features.");
> +  _dl_diagnostics_print_labeled_value (label, value);
> +}
> +
> +static void
> +print_per_cpu_value (const struct dl_iterate_cpu *dic,
> +                     const char *label, uint64_t value)
> +{
> +  _dl_printf ("aarch64.processor[0x%x].", dic->processor_index);
> +  _dl_diagnostics_print_labeled_value (label, value);
> +}
> +
> +void
> +_dl_diagnostics_cpu (void)
> +{
> +  print_cpu_features_value ("bti", GLRO (dl_aarch64_cpu_features).bti);
> +  print_cpu_features_value ("midr_el1",
> +                            GLRO (dl_aarch64_cpu_features).midr_el1);
> +  print_cpu_features_value ("mops", GLRO (dl_aarch64_cpu_features).mops);
> +  print_cpu_features_value ("mte_state",
> +                            GLRO (dl_aarch64_cpu_features).mte_state);
> +  print_cpu_features_value ("prefer_sve_ifuncs",
> +                            GLRO (dl_aarch64_cpu_features).prefer_sve_ifuncs);
> +  print_cpu_features_value ("sve", GLRO (dl_aarch64_cpu_features).sve);
> +  print_cpu_features_value ("zva_size",
> +                            GLRO (dl_aarch64_cpu_features).zva_size);
> +
> +  struct dl_iterate_cpu dic;
> +  _dl_iterate_cpu_init (&dic);
> +
> +  while (_dl_iterate_cpu_next (&dic))
> +    {
> +      if (dic.requested_cpu >= 0)
> +        _dl_printf ("aarch64.processor[0x%x].requested=0x%x\n",
> +                    dic.processor_index, dic.requested_cpu);
> +      if (dic.actual_cpu >= 0)
> +        _dl_printf ("aarch64.processor[0x%x].observed=0x%x\n",
> +                    dic.processor_index, dic.actual_cpu);
> +      if (dic.actual_node >= 0)
> +        _dl_printf ("aarch64.processor[0x%x].observed_node=0x%x\n",
> +                    dic.processor_index, dic.actual_node);
> +
> +      if (GLRO (dl_hwcap) & HWCAP_CPUID)
> +        {
> +          uint64_t midr_el1;
> +          asm ("mrs %0, midr_el1" : "=r" (midr_el1));
> +          print_per_cpu_value (&dic, "midr_el1", midr_el1);
> +        }
> +
> +      {
> +        uint64_t dczid_el0;
> +        asm ("mrs %0, dczid_el0" : "=r" (dczid_el0));
> +        print_per_cpu_value (&dic, "dczid_el0", dczid_el0);
> +      }
> +    }
> +}

The rest looks ok.
Szabolcs Nagy April 5, 2024, 2:49 p.m. UTC | #2
The 04/05/2024 12:16, Florian Weimer wrote:
> This prints some information from struct cpu_features, and the midr_el1
> and dczid_el0 system register contents on every CPU.

thanks.

i think we already rely on zva size to be the same across all cores
(in memset) and i don't think linux allows different dczid_el0 per
core (even if somebody built such a system).

so i don't think that is needed.

...
> +++ b/sysdeps/aarch64/dl-diagnostics-cpu.c
> @@ -0,0 +1,84 @@
> +/* Print CPU diagnostics data in ld.so.  AArch64 version.
> +   Copyright (C) 2021-2024 Free Software Foundation, Inc.
> +   This file is part of the GNU C Library.
> +
> +   The GNU C Library is free software; you can redistribute it and/or
> +   modify it under the terms of the GNU Lesser General Public
> +   License as published by the Free Software Foundation; either
> +   version 2.1 of the License, or (at your option) any later version.
> +
> +   The GNU C Library is distributed in the hope that it will be useful,
> +   but WITHOUT ANY WARRANTY; without even the implied warranty of
> +   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
> +   Lesser General Public License for more details.
> +
> +   You should have received a copy of the GNU Lesser General Public
> +   License along with the GNU C Library; if not, see
> +   <https://www.gnu.org/licenses/>.  */
> +
> +#include <dl-diagnostics.h>
> +
> +#include <cpu-features.h>
> +#include <dl-iterate_cpu.h>
> +#include <ldsodefs.h>
> +#include <sys/auxv.h>
> +
> +static void
> +print_cpu_features_value (const char *label, uint64_t value)
> +{
> +  _dl_printf ("aarch64.cpu_features.");
> +  _dl_diagnostics_print_labeled_value (label, value);
> +}
> +
> +static void
> +print_per_cpu_value (const struct dl_iterate_cpu *dic,
> +                     const char *label, uint64_t value)
> +{
> +  _dl_printf ("aarch64.processor[0x%x].", dic->processor_index);
> +  _dl_diagnostics_print_labeled_value (label, value);
> +}
> +
> +void
> +_dl_diagnostics_cpu (void)
> +{
> +  print_cpu_features_value ("bti", GLRO (dl_aarch64_cpu_features).bti);
> +  print_cpu_features_value ("midr_el1",
> +                            GLRO (dl_aarch64_cpu_features).midr_el1);
> +  print_cpu_features_value ("mops", GLRO (dl_aarch64_cpu_features).mops);
> +  print_cpu_features_value ("mte_state",
> +                            GLRO (dl_aarch64_cpu_features).mte_state);
> +  print_cpu_features_value ("prefer_sve_ifuncs",
> +                            GLRO (dl_aarch64_cpu_features).prefer_sve_ifuncs);
> +  print_cpu_features_value ("sve", GLRO (dl_aarch64_cpu_features).sve);
> +  print_cpu_features_value ("zva_size",
> +                            GLRO (dl_aarch64_cpu_features).zva_size);

i would use something like

  const struct cpu_features *p = &GLRO (dl_aarch64_cpu_features);
  ... p->bti ...

or even

#define P(x) print_cpu_features_value (#x, GLRO (dl_aarch64_cpu_features).x)

to make this list more compact.

i wonder if we should place a comment in init-arch.h to update
_dl_diagnostics_cpu in case ifunc rules change as this seems
easy to forget

> +
> +  struct dl_iterate_cpu dic;
> +  _dl_iterate_cpu_init (&dic);
> +
> +  while (_dl_iterate_cpu_next (&dic))
> +    {
> +      if (dic.requested_cpu >= 0)
> +        _dl_printf ("aarch64.processor[0x%x].requested=0x%x\n",
> +                    dic.processor_index, dic.requested_cpu);
> +      if (dic.actual_cpu >= 0)
> +        _dl_printf ("aarch64.processor[0x%x].observed=0x%x\n",
> +                    dic.processor_index, dic.actual_cpu);
> +      if (dic.actual_node >= 0)
> +        _dl_printf ("aarch64.processor[0x%x].observed_node=0x%x\n",
> +                    dic.processor_index, dic.actual_node);
> +
> +      if (GLRO (dl_hwcap) & HWCAP_CPUID)
> +        {
> +          uint64_t midr_el1;
> +          asm ("mrs %0, midr_el1" : "=r" (midr_el1));
> +          print_per_cpu_value (&dic, "midr_el1", midr_el1);
> +        }
> +
> +      {
> +        uint64_t dczid_el0;
> +        asm ("mrs %0, dczid_el0" : "=r" (dczid_el0));
> +        print_per_cpu_value (&dic, "dczid_el0", dczid_el0);
> +      }
> +    }
> +}
> -- 
> 2.44.0
>
Florian Weimer April 5, 2024, 2:54 p.m. UTC | #3
* Szabolcs Nagy:

> The 04/05/2024 12:16, Florian Weimer wrote:
>> This prints some information from struct cpu_features, and the midr_el1
>> and dczid_el0 system register contents on every CPU.
>
> thanks.
>
> i think we already rely on zva size to be the same across all cores
> (in memset) and i don't think linux allows different dczid_el0 per
> core (even if somebody built such a system).
>
> so i don't think that is needed.

Well … we've seen per-core feature sets change on some cores after
suspend/resume (although not on aarch64).  That's why we have t he
per-CPU iterator in the first place.

> i wonder if we should place a comment in init-arch.h to update
> _dl_diagnostics_cpu in case ifunc rules change as this seems
> easy to forget

I'll add a comment.

Thanks,
Florian
Szabolcs Nagy April 8, 2024, 7:36 a.m. UTC | #4
The 04/05/2024 16:54, Florian Weimer wrote:
> * Szabolcs Nagy:
> 
> > The 04/05/2024 12:16, Florian Weimer wrote:
> >> This prints some information from struct cpu_features, and the midr_el1
> >> and dczid_el0 system register contents on every CPU.
> >
> > thanks.
> >
> > i think we already rely on zva size to be the same across all cores
> > (in memset) and i don't think linux allows different dczid_el0 per
> > core (even if somebody built such a system).
> >
> > so i don't think that is needed.
> 
> Well … we've seen per-core feature sets change on some cores after
> suspend/resume (although not on aarch64).  That's why we have t he
> per-CPU iterator in the first place.

linux does not support mismatch across cores and they check
for it, so unless you resume after reboot with a different
set of cpus online there should not be a mismatch.

but if you think it is still useful just to be sure i'm not
against printing it n times.
Florian Weimer April 8, 2024, 8:38 a.m. UTC | #5
* Adhemerval Zanella Netto:

> On 05/04/24 07:16, Florian Weimer wrote:
>> This prints some information from struct cpu_features, and the midr_el1
>> and dczid_el0 system register contents on every CPU.
>> ---
>>  manual/dynlink.texi                  | 34 +++++++++++
>>  sysdeps/aarch64/dl-diagnostics-cpu.c | 84 ++++++++++++++++++++++++++++
>>  2 files changed, 118 insertions(+)
>>  create mode 100644 sysdeps/aarch64/dl-diagnostics-cpu.c
>> 
>> diff --git a/manual/dynlink.texi b/manual/dynlink.texi
>> index f2f2341818..6f4acf321d 100644
>> --- a/manual/dynlink.texi
>> +++ b/manual/dynlink.texi
>> @@ -224,6 +224,40 @@ reflect adjustment by @theglibc{}.
>>  These Linux-specific items show the values of @code{struct utsname}, as
>>  reported by the @code{uname} function.  @xref{Platform Type}.
>>  
>> +@item aarch64.cpu_features.@dots{}
>> +These items are specific to the AArch64 architectures.  They report data
>> +that is used by @theglibc{} to select alternative function
>> +implementations.
>
> Maybe also add some options are security related and not really tied
> to ifunc support (mte, bti).

I think MTE is also about selecting an implementation variant.  I will
add something regarding BTI.

>> diff --git a/sysdeps/aarch64/dl-diagnostics-cpu.c b/sysdeps/aarch64/dl-diagnostics-cpu.c
>> new file mode 100644
>> index 0000000000..e037e6ea8c
>> --- /dev/null
>> +++ b/sysdeps/aarch64/dl-diagnostics-cpu.c
>> @@ -0,0 +1,84 @@
>> +/* Print CPU diagnostics data in ld.so.  AArch64 version.
>> +   Copyright (C) 2021-2024 Free Software Foundation, Inc.
>
> Maybe just 2024 here.

I started with a copy of the x86 file.

Thanks,
Florian
diff mbox series

Patch

diff --git a/manual/dynlink.texi b/manual/dynlink.texi
index f2f2341818..6f4acf321d 100644
--- a/manual/dynlink.texi
+++ b/manual/dynlink.texi
@@ -224,6 +224,40 @@  reflect adjustment by @theglibc{}.
 These Linux-specific items show the values of @code{struct utsname}, as
 reported by the @code{uname} function.  @xref{Platform Type}.
 
+@item aarch64.cpu_features.@dots{}
+These items are specific to the AArch64 architectures.  They report data
+that is used by @theglibc{} to select alternative function
+implementations.
+
+@item aarch64.processor[@var{index}].@dots{}
+These are additional items for the AArch64 architecture and are
+described below.
+
+@item aarch64.processor[@var{index}].requested=@var{kernel-cpu}
+The kernel is told to run the subsequent probing on the CPU numbered
+@var{kernel-cpu}.  The values @var{kernel-cpu} and @var{index} can be
+distinct if there are gaps in the process CPU affinity mask.  This line
+is not included if CPU affinity mask information is not available.
+
+@item aarch64.processor[@var{index}].observed=@var{kernel-cpu}
+This line reports the kernel CPU number @var{kernel-cpu} on which the
+probing code initially ran.  If the CPU number cannot be obtained,
+this line is not printed.
+
+@item aarch64.processor[@var{index}].observed_node=@var{node}
+This reports the observed NUMA node number, as reported by the
+@code{getcpu} system call.  If this information cannot be obtained, this
+line is not printed.
+
+@item aarch64.processor[@var{index}].midr_el1=@var{value}
+The value of the @code{midr_el1} system register on the processor
+@var{index}.  This line is only printed if the kernel indicates that
+this system register is supported.
+
+@item aarch64.processor[@var{index}].dczid_el0=@var{value}
+The value of the @code{dczid_el0} system register on the processor
+@var{index}.
+
 @cindex CPUID (diagnostics)
 @item x86.cpu_features.@dots{}
 These items are specific to the i386 and x86-64 architectures.  They
diff --git a/sysdeps/aarch64/dl-diagnostics-cpu.c b/sysdeps/aarch64/dl-diagnostics-cpu.c
new file mode 100644
index 0000000000..e037e6ea8c
--- /dev/null
+++ b/sysdeps/aarch64/dl-diagnostics-cpu.c
@@ -0,0 +1,84 @@ 
+/* Print CPU diagnostics data in ld.so.  AArch64 version.
+   Copyright (C) 2021-2024 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#include <dl-diagnostics.h>
+
+#include <cpu-features.h>
+#include <dl-iterate_cpu.h>
+#include <ldsodefs.h>
+#include <sys/auxv.h>
+
+static void
+print_cpu_features_value (const char *label, uint64_t value)
+{
+  _dl_printf ("aarch64.cpu_features.");
+  _dl_diagnostics_print_labeled_value (label, value);
+}
+
+static void
+print_per_cpu_value (const struct dl_iterate_cpu *dic,
+                     const char *label, uint64_t value)
+{
+  _dl_printf ("aarch64.processor[0x%x].", dic->processor_index);
+  _dl_diagnostics_print_labeled_value (label, value);
+}
+
+void
+_dl_diagnostics_cpu (void)
+{
+  print_cpu_features_value ("bti", GLRO (dl_aarch64_cpu_features).bti);
+  print_cpu_features_value ("midr_el1",
+                            GLRO (dl_aarch64_cpu_features).midr_el1);
+  print_cpu_features_value ("mops", GLRO (dl_aarch64_cpu_features).mops);
+  print_cpu_features_value ("mte_state",
+                            GLRO (dl_aarch64_cpu_features).mte_state);
+  print_cpu_features_value ("prefer_sve_ifuncs",
+                            GLRO (dl_aarch64_cpu_features).prefer_sve_ifuncs);
+  print_cpu_features_value ("sve", GLRO (dl_aarch64_cpu_features).sve);
+  print_cpu_features_value ("zva_size",
+                            GLRO (dl_aarch64_cpu_features).zva_size);
+
+  struct dl_iterate_cpu dic;
+  _dl_iterate_cpu_init (&dic);
+
+  while (_dl_iterate_cpu_next (&dic))
+    {
+      if (dic.requested_cpu >= 0)
+        _dl_printf ("aarch64.processor[0x%x].requested=0x%x\n",
+                    dic.processor_index, dic.requested_cpu);
+      if (dic.actual_cpu >= 0)
+        _dl_printf ("aarch64.processor[0x%x].observed=0x%x\n",
+                    dic.processor_index, dic.actual_cpu);
+      if (dic.actual_node >= 0)
+        _dl_printf ("aarch64.processor[0x%x].observed_node=0x%x\n",
+                    dic.processor_index, dic.actual_node);
+
+      if (GLRO (dl_hwcap) & HWCAP_CPUID)
+        {
+          uint64_t midr_el1;
+          asm ("mrs %0, midr_el1" : "=r" (midr_el1));
+          print_per_cpu_value (&dic, "midr_el1", midr_el1);
+        }
+
+      {
+        uint64_t dczid_el0;
+        asm ("mrs %0, dczid_el0" : "=r" (dczid_el0));
+        print_per_cpu_value (&dic, "dczid_el0", dczid_el0);
+      }
+    }
+}