Message ID | d18a96699315f7ad74f9f4454dd2759c4c5da483.1531801545.git.zong@andestech.com |
---|---|
State | New |
Headers | show |
Series | RISC-V glibc port for the 32 bit | expand |
diff --git a/sysdeps/unix/sysv/linux/riscv/ldconfig.h b/sysdeps/unix/sysv/linux/riscv/ldconfig.h index 0ca798a..088c201 100644 --- a/sysdeps/unix/sysv/linux/riscv/ldconfig.h +++ b/sysdeps/unix/sysv/linux/riscv/ldconfig.h @@ -24,7 +24,7 @@ #if __riscv_xlen == 64 # define LD_SO_ABI "riscv64-lp64" #else -# error "rv32i-based targets are not supported" +# define LD_SO_ABI "riscv32-ilp32" #endif #define SYSDEP_KNOWN_INTERPRETER_NAMES \