Message ID | 20200423014126.10417-5-vgupta@synopsys.com |
---|---|
State | New |
Headers | show |
Series | glibc port to ARC processors | expand |
On 22/04/2020 22:41, Vineet Gupta via Libc-alpha wrote: > Signed-off-by: Vineet Gupta <vgupta@synopsys.com> glibc uses copyright assignment to the FSF for contributions, and not the DCO. > --- > sysdeps/arc/atomic-machine.h | 69 +++++++++++++++++++++++++++++++ > sysdeps/arc/nptl/bits/semaphore.h | 32 ++++++++++++++ > 2 files changed, 101 insertions(+) > create mode 100644 sysdeps/arc/atomic-machine.h > create mode 100644 sysdeps/arc/nptl/bits/semaphore.h > > diff --git a/sysdeps/arc/nptl/bits/semaphore.h b/sysdeps/arc/nptl/bits/semaphore.h > new file mode 100644 > index 000000000000..772dc4cb9b01 > --- /dev/null > +++ b/sysdeps/arc/nptl/bits/semaphore.h This might a good candidate to a refactor to add a Linux default one, thus avoiding any new architecture to copy/paste it. > @@ -0,0 +1,32 @@ > +/* Machine-specific POSIX semaphore type layouts. ARC version. > + Copyright (C) 2002-2020 Free Software Foundation, Inc. > + This file is part of the GNU C Library. > + > + The GNU C Library is free software; you can redistribute it and/or > + modify it under the terms of the GNU Lesser General Public > + License as published by the Free Software Foundation; either > + version 2.1 of the License, or (at your option) any later version. > + > + The GNU C Library is distributed in the hope that it will be useful, > + but WITHOUT ANY WARRANTY; without even the implied warranty of > + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU > + Lesser General Public License for more details. > + > + You should have received a copy of the GNU Lesser General Public > + License along with the GNU C Library; if not, see > + <https://www.gnu.org/licenses/>. */ > + > +#ifndef _SEMAPHORE_H > +# error "Never use <bits/semaphore.h> directly; include <semaphore.h> instead." > +#endif > + > +#define __SIZEOF_SEM_T 16 > + > +/* Value returned if `sem_open' failed. */ > +#define SEM_FAILED ((sem_t *) 0) > + > +typedef union > +{ > + char __size[__SIZEOF_SEM_T]; > + long int __align; > +} sem_t; >
On 4/23/20 10:20 AM, Adhemerval Zanella via Libc-alpha wrote: > > > On 22/04/2020 22:41, Vineet Gupta via Libc-alpha wrote: >> Signed-off-by: Vineet Gupta <vgupta@synopsys.com> > > glibc uses copyright assignment to the FSF for contributions, and not > the DCO. Ok removed from all patches. >> --- >> sysdeps/arc/atomic-machine.h | 69 +++++++++++++++++++++++++++++++ >> sysdeps/arc/nptl/bits/semaphore.h | 32 ++++++++++++++ >> 2 files changed, 101 insertions(+) >> create mode 100644 sysdeps/arc/atomic-machine.h >> create mode 100644 sysdeps/arc/nptl/bits/semaphore.h >> > >> diff --git a/sysdeps/arc/nptl/bits/semaphore.h b/sysdeps/arc/nptl/bits/semaphore.h >> new file mode 100644 >> index 000000000000..772dc4cb9b01 >> --- /dev/null >> +++ b/sysdeps/arc/nptl/bits/semaphore.h > > This might a good candidate to a refactor to add a Linux default one, > thus avoiding any new architecture to copy/paste it. Sure. (1). s390, sparc: __SIZEOF_SEM_T {16,32} if WORDSIZE == {32,64} (2). arc, arm, csky, hppa, microblaze, nios2, sh:__SIZEOF_SEM_T 16 (32-bit arch) (3). ia64: __SIZEOF_SEM_T 16 (64-bit only) (4). aarch64, mips, riscv are bimodal too but use arch specific knobs to build for 32/64 bit. Can we change 2, 3, 4, to use generic mechanism of (1) ? The constraints come automatically given WORDSIZE will be function of arch + ABI (ILP32, LP64 etc) Or else we can have (2) be the Linux default version and all others come from arch sysdep.
diff --git a/sysdeps/arc/atomic-machine.h b/sysdeps/arc/atomic-machine.h new file mode 100644 index 000000000000..6cf128dc7fa8 --- /dev/null +++ b/sysdeps/arc/atomic-machine.h @@ -0,0 +1,69 @@ +/* Low-level functions for atomic operations. ARC version. + Copyright (C) 2012-2020 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library. If not, see + <https://www.gnu.org/licenses/>. */ + +#ifndef _ARC_BITS_ATOMIC_H +#define _ARC_BITS_ATOMIC_H 1 + +#include <stdint.h> + +typedef int32_t atomic32_t; +typedef uint32_t uatomic32_t; +typedef int_fast32_t atomic_fast32_t; +typedef uint_fast32_t uatomic_fast32_t; + +typedef intptr_t atomicptr_t; +typedef uintptr_t uatomicptr_t; +typedef intmax_t atomic_max_t; +typedef uintmax_t uatomic_max_t; + +#define __HAVE_64B_ATOMICS 0 +#define USE_ATOMIC_COMPILER_BUILTINS 1 + +/* ARC does have legacy atomic EX reg, [mem] instruction but the micro-arch + is not as optimal as LLOCK/SCOND specially for SMP. */ +#define ATOMIC_EXCHANGE_USES_CAS 1 + +#define __arch_compare_and_exchange_bool_8_acq(mem, newval, oldval) \ + (abort (), 0) +#define __arch_compare_and_exchange_bool_16_acq(mem, newval, oldval) \ + (abort (), 0) +#define __arch_compare_and_exchange_bool_64_acq(mem, newval, oldval) \ + (abort (), 0) + +#define __arch_compare_and_exchange_val_8_int(mem, newval, oldval, model) \ + (abort (), (__typeof (*mem)) 0) +#define __arch_compare_and_exchange_val_16_int(mem, newval, oldval, model) \ + (abort (), (__typeof (*mem)) 0) +#define __arch_compare_and_exchange_val_64_int(mem, newval, oldval, model) \ + (abort (), (__typeof (*mem)) 0) + +#define __arch_compare_and_exchange_val_32_int(mem, newval, oldval, model) \ + ({ \ + typeof (*mem) __oldval = (oldval); \ + __atomic_compare_exchange_n (mem, (void *) &__oldval, newval, 0, \ + model, __ATOMIC_RELAXED); \ + __oldval; \ + }) + +#define atomic_compare_and_exchange_val_acq(mem, new, old) \ + __atomic_val_bysize (__arch_compare_and_exchange_val, int, \ + mem, new, old, __ATOMIC_ACQUIRE) + +#define atomic_full_barrier() ({ asm volatile ("dmb 3":::"memory"); }) + +#endif /* _ARC_BITS_ATOMIC_H */ diff --git a/sysdeps/arc/nptl/bits/semaphore.h b/sysdeps/arc/nptl/bits/semaphore.h new file mode 100644 index 000000000000..772dc4cb9b01 --- /dev/null +++ b/sysdeps/arc/nptl/bits/semaphore.h @@ -0,0 +1,32 @@ +/* Machine-specific POSIX semaphore type layouts. ARC version. + Copyright (C) 2002-2020 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <https://www.gnu.org/licenses/>. */ + +#ifndef _SEMAPHORE_H +# error "Never use <bits/semaphore.h> directly; include <semaphore.h> instead." +#endif + +#define __SIZEOF_SEM_T 16 + +/* Value returned if `sem_open' failed. */ +#define SEM_FAILED ((sem_t *) 0) + +typedef union +{ + char __size[__SIZEOF_SEM_T]; + long int __align; +} sem_t;
Signed-off-by: Vineet Gupta <vgupta@synopsys.com> --- sysdeps/arc/atomic-machine.h | 69 +++++++++++++++++++++++++++++++ sysdeps/arc/nptl/bits/semaphore.h | 32 ++++++++++++++ 2 files changed, 101 insertions(+) create mode 100644 sysdeps/arc/atomic-machine.h create mode 100644 sysdeps/arc/nptl/bits/semaphore.h