From patchwork Thu Dec 8 18:52:27 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mike Frysinger X-Patchwork-Id: 704197 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3tZPdD4wFQz9vDZ for ; Fri, 9 Dec 2016 05:53:04 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.b="B02XJz5e"; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=wC1DQhEfgf9I+hXkXLP3S3+8qwWYMNN Lx9VUePdYpm/R5q893teGonuovENj+1MWm2hNw7cahK+9tiKwy/fzV2sJTagNoEV WFhatDTLlPwW20Ag13VqKbngouWmtQYg1DMHqRPedxkaleJWZtgNNEwnsBeLJPdA 3Jg31AFG8gOE= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=zq0SZrF0LpSGVwRGSG7OK+k5fpY=; b=B02XJ z5ekRQ1CJaKa/TlX4IhKwXT/eNKfkrlkTWA4elCM88z7MiPYIcXWZRtRBv54Syv9 tFjnZmRMTdnTlds2h1KniETi3hViW0wIT0CkSnGvvI8GEg+gJBm6pbWHtIZ+9j2K gdi5xbbeLquD5jZznOqlOPieWMbMHEF7AD4Gz0= Received: (qmail 77364 invoked by alias); 8 Dec 2016 18:52:44 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 77296 invoked by uid 89); 8 Dec 2016 18:52:44 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-4.9 required=5.0 tests=BAYES_00, RP_MATCHES_RCVD, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: smtp.gentoo.org From: Mike Frysinger To: libc-alpha@sourceware.org Subject: [PATCH 2/4] alpha: fix floor on sNaN input [committed/2.24] Date: Thu, 8 Dec 2016 13:52:27 -0500 Message-Id: <20161208185229.22804-2-vapier@gentoo.org> In-Reply-To: <20161208185229.22804-1-vapier@gentoo.org> References: <20161208185229.22804-1-vapier@gentoo.org> From: Aurelien Jarno The alpha version of floor wrongly return sNaN for sNaN input. Fix that by checking for NaN and by returning the input value added with itself in that case. Finally remove the code to handle inexact exception, floor should never generate such an exception. Changelog: * sysdeps/alpha/fpu/s_floor.c (__floor): Add argument with itself when it is a NaN. [_IEEE_FP_INEXACT] Remove. * sysdeps/alpha/fpu/s_floorf.c (__floorf): Likewise. (cherry picked from commit 65cc568cf57156e5230db9a061645e54ff028a41) --- ChangeLog | 4 ++++ sysdeps/alpha/fpu/s_floor.c | 7 +++---- sysdeps/alpha/fpu/s_floorf.c | 7 +++---- 3 files changed, 10 insertions(+), 8 deletions(-) diff --git a/ChangeLog b/ChangeLog index 927e1ae9b426..77204f41bc35 100644 --- a/ChangeLog +++ b/ChangeLog @@ -4,6 +4,10 @@ when it is a NaN. [_IEEE_FP_INEXACT] Remove. * sysdeps/alpha/fpu/s_ceilf.c (__ceilf): Likewise. + * sysdeps/alpha/fpu/s_floor.c (__floor): Add argument with itself + when it is a NaN. + [_IEEE_FP_INEXACT] Remove. + * sysdeps/alpha/fpu/s_floorf.c (__floorf): Likewise. 2016-11-30 H.J. Lu diff --git a/sysdeps/alpha/fpu/s_floor.c b/sysdeps/alpha/fpu/s_floor.c index 1a6f8c461756..9930f6be42af 100644 --- a/sysdeps/alpha/fpu/s_floor.c +++ b/sysdeps/alpha/fpu/s_floor.c @@ -27,16 +27,15 @@ double __floor (double x) { + if (isnan (x)) + return x + x; + if (isless (fabs (x), 9007199254740992.0)) /* 1 << DBL_MANT_DIG */ { double tmp1, new_x; __asm ( -#ifdef _IEEE_FP_INEXACT - "cvttq/svim %2,%1\n\t" -#else "cvttq/svm %2,%1\n\t" -#endif "cvtqt/m %1,%0\n\t" : "=f"(new_x), "=&f"(tmp1) : "f"(x)); diff --git a/sysdeps/alpha/fpu/s_floorf.c b/sysdeps/alpha/fpu/s_floorf.c index 8cd80e2b42d7..015c04f40d80 100644 --- a/sysdeps/alpha/fpu/s_floorf.c +++ b/sysdeps/alpha/fpu/s_floorf.c @@ -26,6 +26,9 @@ float __floorf (float x) { + if (isnanf (x)) + return x + x; + if (isless (fabsf (x), 16777216.0f)) /* 1 << FLT_MANT_DIG */ { /* Note that Alpha S_Floating is stored in registers in a @@ -36,11 +39,7 @@ __floorf (float x) float tmp1, tmp2, new_x; __asm ("cvtst/s %3,%2\n\t" -#ifdef _IEEE_FP_INEXACT - "cvttq/svim %2,%1\n\t" -#else "cvttq/svm %2,%1\n\t" -#endif "cvtqt/m %1,%0\n\t" : "=f"(new_x), "=&f"(tmp1), "=&f"(tmp2) : "f"(x));