From patchwork Tue Aug 12 16:08:27 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 379400 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id CBD4A1400E7 for ; Wed, 13 Aug 2014 02:08:56 +1000 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:date:from:to:subject:message-id:reply-to :mime-version:content-type; q=dns; s=default; b=xDGmxLMXsS8g+HC9 tTNXMxFuhBqc/0v93dAOUDnRuf3IJVzhm1jOtOiMUxlnfTcZ0L4FLGgNbgeSGAOl H12IhAnT+AHAaMFRG/LSwHzslFmXihpMhf6sW9+dS34d2NBwZArDEHtP4Qchmzpu shLAwfrliUJMnJlsYJpe0otNAiU= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:date:from:to:subject:message-id:reply-to :mime-version:content-type; s=default; bh=rLSoEK0vgOYWUcER+utuNW uKMD8=; b=aa38DOCZc2h7gsp50L04zDgPCao008Jtv+0g4g1rv+Ni1TJg54NBvw +MRk24ENCJuWaGDQRI36AaAA0uueLxhgW5OOTVv8/l4LvJOzzNmoLAWrIV/10IMY RHBIruWqaK6Pz0HbJ1Pl+AAFIzoZ98JFh1yeJdyEOD5LOjAi3w0Nc= Received: (qmail 19932 invoked by alias); 12 Aug 2014 16:08:49 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 19918 invoked by uid 89); 12 Aug 2014 16:08:47 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-3.3 required=5.0 tests=AWL, BAYES_00, NO_DNS_FOR_FROM, RP_MATCHES_RCVD autolearn=ham version=3.3.2 X-HELO: mga01.intel.com X-ExtLoop1: 1 Date: Tue, 12 Aug 2014 09:08:27 -0700 From: "H.J. Lu" To: GNU C Library Subject: PATCH [BZ #17259]: sysdeps/x86_64/cacheinfo.c:intel_check_word may corrupt rbx Message-ID: <20140812160827.GA14354@intel.com> Reply-To: "H.J. Lu" MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.23 (2014-03-12) intel_check_word has asm volatile ("xchgl %%ebx, %1; cpuid; xchgl %%ebx, %1" : "=a" (eax), "=r" (ebx), "=c" (ecx), "=d" (edx) : "0" (4), "2" (round)); The only register compiler isn't aware of is RBX. No other registers are impacted. We are lucky that it doesn't cause any problems since RBX is also used by compiler for other purposes so that RBX is saved and restored in intel_check_word. This patch uses __cpuid_count instead. Tested on x86 and x86-64. OK to install? Thanks. H.J. --- 2014-08-12 H.J. Lu [BZ #17259] * sysdeps/x86_64/cacheinfo.c (intel_check_word): Replace cpuid asm statement with __cpuid_count. diff --git a/sysdeps/x86_64/cacheinfo.c b/sysdeps/x86_64/cacheinfo.c index 163af2a..ca13a53 100644 --- a/sysdeps/x86_64/cacheinfo.c +++ b/sysdeps/x86_64/cacheinfo.c @@ -191,9 +191,7 @@ intel_check_word (int name, unsigned int value, bool *has_level_2, unsigned int round = 0; while (1) { - asm volatile ("xchgl %%ebx, %1; cpuid; xchgl %%ebx, %1" - : "=a" (eax), "=r" (ebx), "=c" (ecx), "=d" (edx) - : "0" (4), "2" (round)); + __cpuid_count (4, round, eax, ebx, ecx, edx); enum { null = 0, data = 1, inst = 2, uni = 3 } type = eax & 0x1f; if (type == null)