Message ID | 1467326157-32579-1-git-send-email-aurelien@aurel32.net |
---|---|
State | New |
Headers | show |
From: Aurelien Jarno <aurelien@aurel32.net> Date: Fri, 1 Jul 2016 00:35:57 +0200 > nearbyint and nearbyintf should not trigger inexact exceptions, but > should still trigger an invalid exception for a sNaN input. > > The SPARC specific implementations of these functions save the FSR at > the beginning of the function and restore it at the end to not trigger > an inexact exception. This however doesn't work for an sNaN input which > need to trigger an invalid exception. Fix that by adding a fcmp > instruction using the input value before saving FSR, so that an invalid > exception is triggered for a sNaN input. > > This fixes the math/test-nearbyint-except test on SPARC. Looks good.
diff --git a/ChangeLog b/ChangeLog index 497bfe5..170c549 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,5 +1,21 @@ 2016-06-30 Aurelien Jarno <aurelien@aurel32.net> + * sparc/sparc32/sparcv9/fpu/s_nearbyint.S (__nearbyint): Trigger an + invalid exception for sNaN. + * sparc/sparc32/sparcv9/fpu/s_nearbyintf.S (__nearbyintf): Likewise. + * sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-vis3.S + (__nearbyint_vis3): Likewise + * sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-vis3.S + (__nearbyintf_vis3): Likewise + * sparc/sparc64/fpu/s_nearbyint.S (__nearbyint): Likewise. + * sparc/sparc64/fpu/s_nearbyintf.S (__nearbyintf): Likewise. + * sparc/sparc64/fpu/multiarch/s_nearbyint-vis3.S (__nearbyint_vis3): + Likewise. + * sparc/sparc64/fpu/multiarch/s_nearbyintf-vis3.S (__nearbyintf_vis3): + Likewise + +2016-06-30 Aurelien Jarno <aurelien@aurel32.net> + * sysdeps/unix/sysv/linux/sparc/sparc64/localplt.data: Add _Qp_cmp. 2016-06-30 Andreas Schwab <schwab@suse.de> diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-vis3.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-vis3.S index 4475e8c..d9ff0cc 100644 --- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-vis3.S +++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-vis3.S @@ -36,6 +36,7 @@ #define SIGN_BIT %f12 /* -0.0 */ ENTRY (__nearbyint_vis3) + fcmpd %fcc3, %f0, %f0 /* Check for sNaN */ st %fsr, [%sp + 88] sethi %hi(TWO_FIFTYTWO), %o2 sethi %hi(0xf8003e0), %o5 diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-vis3.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-vis3.S index e39134b..5cd1eb0 100644 --- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-vis3.S +++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-vis3.S @@ -35,6 +35,7 @@ #define SIGN_BIT %f12 /* -0.0 */ ENTRY (__nearbyintf_vis3) + fcmps %fcc3, %f1, %f1 /* Check for sNaN */ st %fsr, [%sp + 88] movwtos %o0, %f1 sethi %hi(TWO_TWENTYTHREE), %o2 diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyint.S b/sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyint.S index 29b56b4..84a1097 100644 --- a/sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyint.S +++ b/sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyint.S @@ -36,6 +36,7 @@ #define SIGN_BIT %f12 /* -0.0 */ ENTRY (__nearbyint) + fcmpd %fcc3, %f0, %f0 /* Check for sNaN */ st %fsr, [%sp + 88] sethi %hi(TWO_FIFTYTWO), %o2 sethi %hi(0xf8003e0), %o5 diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyintf.S b/sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyintf.S index e2188b2..d5cf5ce 100644 --- a/sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyintf.S +++ b/sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyintf.S @@ -35,6 +35,7 @@ #define SIGN_BIT %f12 /* -0.0 */ ENTRY (__nearbyintf) + fcmps %fcc3, %f1, %f1 /* Check for sNaN */ st %fsr, [%sp + 88] st %o0, [%sp + 68] sethi %hi(TWO_TWENTYTHREE), %o2 diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-vis3.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-vis3.S index fff277a..3180554 100644 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-vis3.S +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-vis3.S @@ -35,6 +35,7 @@ #define SIGN_BIT %f12 /* -0.0 */ ENTRY (__nearbyint_vis3) + fcmpd %fcc3, %f0, %f0 /* Check for sNaN */ stx %fsr, [%sp + STACK_BIAS + 144] sethi %hi(TWO_FIFTYTWO), %o2 sllx %o2, 32, %o2 diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf-vis3.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf-vis3.S index c6e94ba..7bf7eed 100644 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf-vis3.S +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf-vis3.S @@ -35,6 +35,7 @@ #define SIGN_BIT %f12 /* -0.0 */ ENTRY (__nearbyintf_vis3) + fcmps %fcc3, %f1, %f1 /* Check for sNaN */ stx %fsr, [%sp + STACK_BIAS + 144] sethi %hi(0xf8003e0), %o5 sethi %hi(TWO_TWENTYTHREE), %o2 diff --git a/sysdeps/sparc/sparc64/fpu/s_nearbyint.S b/sysdeps/sparc/sparc64/fpu/s_nearbyint.S index caf4d72..456c315 100644 --- a/sysdeps/sparc/sparc64/fpu/s_nearbyint.S +++ b/sysdeps/sparc/sparc64/fpu/s_nearbyint.S @@ -35,6 +35,7 @@ #define SIGN_BIT %f12 /* -0.0 */ ENTRY (__nearbyint) + fcmpd %fcc3, %f0, %f0 /* Check for sNaN */ stx %fsr, [%sp + STACK_BIAS + 144] sethi %hi(TWO_FIFTYTWO), %o2 sllx %o2, 32, %o2 diff --git a/sysdeps/sparc/sparc64/fpu/s_nearbyintf.S b/sysdeps/sparc/sparc64/fpu/s_nearbyintf.S index 4232eca..d0d9bed 100644 --- a/sysdeps/sparc/sparc64/fpu/s_nearbyintf.S +++ b/sysdeps/sparc/sparc64/fpu/s_nearbyintf.S @@ -35,6 +35,7 @@ #define SIGN_BIT %f12 /* -0.0 */ ENTRY (__nearbyintf) + fcmps %fcc3, %f1, %f1 /* Check for sNaN */ stx %fsr, [%sp + STACK_BIAS + 144] sethi %hi(0xf8003e0), %o5 sethi %hi(TWO_TWENTYTHREE), %o2