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Thu, 2 May 2024 21:54:35 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id UQXeCJsLNGYSagAAD6G6ig (envelope-from ); Thu, 02 May 2024 21:54:35 +0000 From: Martin Jambor To: GCC Patches Cc: "Nagarajan, Muthu kumar raj" , Gerald Pfeifer Subject: [wwwdocs] Add znver5 to GCC 14 changes User-Agent: Notmuch/0.38.2 (https://notmuchmail.org) Emacs/29.3 (x86_64-suse-linux-gnu) Date: Thu, 02 May 2024 23:54:30 +0200 Message-ID: MIME-Version: 1.0 X-Spam-Score: -4.22 X-Rspamd-Action: no action X-Rspamd-Queue-Id: 3EE5A1FD37 X-Spam-Level: X-Rspamd-Server: rspamd2.dmz-prg2.suse.org X-Spamd-Result: default: False [-4.22 / 50.00]; BAYES_HAM(-2.71)[98.72%]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_DKIM_ALLOW(-0.20)[suse.cz:s=susede2_rsa,suse.cz:s=susede2_ed25519]; NEURAL_HAM_SHORT(-0.20)[-0.999]; MIME_GOOD(-0.10)[text/plain]; MX_GOOD(-0.01)[]; FUZZY_BLOCKED(0.00)[rspamd.com]; MID_RHS_MATCH_FROMTLD(0.00)[]; MIME_TRACE(0.00)[0:+]; ARC_NA(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; RCVD_TLS_ALL(0.00)[]; DKIM_SIGNED(0.00)[suse.cz:s=susede2_rsa,suse.cz:s=susede2_ed25519]; FROM_EQ_ENVFROM(0.00)[]; FROM_HAS_DN(0.00)[]; RCPT_COUNT_THREE(0.00)[3]; RCVD_COUNT_TWO(0.00)[2]; TO_MATCH_ENVRCPT_ALL(0.00)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[imap1.dmz-prg2.suse.org:helo,imap1.dmz-prg2.suse.org:rdns]; TO_DN_ALL(0.00)[]; DKIM_TRACE(0.00)[suse.cz:+] X-Spam-Status: No, score=-11.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Hello, based on input from AMD, I'd like to commit the following to the wwwdocs repo to point out new support for Zen 5 based AMD CPUs in GCC 14? Is it OK? Any suggestions, comments or questions? Thanks, Martin diff --git a/htdocs/gcc-14/changes.html b/htdocs/gcc-14/changes.html index 8dfbf7dc..d250340b 100644 --- a/htdocs/gcc-14/changes.html +++ b/htdocs/gcc-14/changes.html @@ -954,6 +954,11 @@ __asm (".global __flmap_lock" "\n\t" -fsanitize=hwaddress will enable -mlam=u57 by default. +
  • GCC now supports AMD CPUs based on the znver5 core via + -march=znver5. Based on ISA extensions enabled on + a znver4 core, the switch further enables the AVXVNNI, MOVDIRI, + MOVDIR64B, AVX512VP2INTERSECT, and PREFETCHI ISA extensions. +

    • MCore