diff mbox series

aarch64: Ensure ZT0 is zeroed in a new-ZT0 function

Message ID mpt5xyikr13.fsf@arm.com
State New
Headers show
Series aarch64: Ensure ZT0 is zeroed in a new-ZT0 function | expand

Commit Message

Richard Sandiford Feb. 21, 2024, 11:14 a.m. UTC 
ACLE guarantees that a function like:

  __arm_new("zt0") foo() { ... }

will start with ZT0 equal to zero.  I'd forgotten to enforce that
after commiting a lazy save.  After such a save, we should zero
ZA iff the function has ZA state and zero ZT0 iff the function
has ZT0 state.

Tested on aarch64-linux-gnu & pushed.

Richard


gcc/
	* config/aarch64/aarch64.cc (aarch64_mode_emit_local_sme_state):
	In the code that commits a lazy save, only zero ZA if the function
	has ZA state.  Similarly zero ZT0 if the function has ZT0 state.

gcc/testsuite/
	* gcc.target/aarch64/sme/zt0_state_5.c (test3): Expect ZT0 rather
	than ZA to be zeroed.
	(test5): Remove zeroing of ZA.
---
 gcc/config/aarch64/aarch64.cc                      | 8 +++++++-
 gcc/testsuite/gcc.target/aarch64/sme/zt0_state_5.c | 3 +--
 2 files changed, 8 insertions(+), 3 deletions(-)
diff mbox series

Patch

diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index ed7fbca512b..de746e28ca5 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -29338,6 +29338,7 @@  aarch64_mode_emit_local_sme_state (aarch64_local_sme_state mode,
 	     bl __arm_tpidr2_save
 	     msr tpidr2_el0, xzr
 	     zero { za }       // Only if ZA is live
+	     zero { zt0 }      // Only if ZT0 is live
 	 no_save:  */
       auto tmp_reg = gen_reg_rtx (DImode);
       emit_insn (gen_aarch64_read_tpidr2 (tmp_reg));
@@ -29348,7 +29349,12 @@  aarch64_mode_emit_local_sme_state (aarch64_local_sme_state mode,
       emit_insn (gen_aarch64_clear_tpidr2 ());
       if (mode == aarch64_local_sme_state::ACTIVE_LIVE
 	  || mode == aarch64_local_sme_state::ACTIVE_DEAD)
-	emit_insn (gen_aarch64_initial_zero_za ());
+	{
+	  if (aarch64_cfun_has_state ("za"))
+	    emit_insn (gen_aarch64_initial_zero_za ());
+	  if (aarch64_cfun_has_state ("zt0"))
+	    emit_insn (gen_aarch64_sme_zero_zt0 ());
+	}
       emit_label (label);
     }
 
diff --git a/gcc/testsuite/gcc.target/aarch64/sme/zt0_state_5.c b/gcc/testsuite/gcc.target/aarch64/sme/zt0_state_5.c
index 0fba21868ed..2e008463aec 100644
--- a/gcc/testsuite/gcc.target/aarch64/sme/zt0_state_5.c
+++ b/gcc/testsuite/gcc.target/aarch64/sme/zt0_state_5.c
@@ -54,7 +54,7 @@  __arm_new("zt0") int test3()
 **	cbz	x0, [^\n]+
 **	bl	__arm_tpidr2_save
 **	msr	tpidr2_el0, xzr
-**	zero	{ za }
+**	zero	{ zt0 }
 **	smstart	za
 **	bl	in_zt0
 **	smstop	za
@@ -102,7 +102,6 @@  __arm_new("zt0") void test5()
 **	cbz	x0, [^\n]+
 **	bl	__arm_tpidr2_save
 **	msr	tpidr2_el0, xzr
-**	zero	{ za }
 **	smstart	za
 **	bl	out_zt0
 **	...