From patchwork Sun Mar 3 19:42:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Georg-Johann Lay X-Patchwork-Id: 1907313 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gjlay.de header.i=@gjlay.de header.a=rsa-sha256 header.s=strato-dkim-0002 header.b=LxJ43ZuD; dkim=pass header.d=gjlay.de header.i=@gjlay.de header.a=ed25519-sha256 header.s=strato-dkim-0003 header.b=qAZWeYXK; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TnsgR54fJz23q5 for ; Mon, 4 Mar 2024 06:42:58 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 6E1CD385840E for ; Sun, 3 Mar 2024 19:42:53 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mo4-p00-ob.smtp.rzone.de (mo4-p00-ob.smtp.rzone.de [81.169.146.160]) by sourceware.org (Postfix) with ESMTPS id E019A3858C32 for ; Sun, 3 Mar 2024 19:42:25 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org E019A3858C32 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=gjlay.de Authentication-Results: sourceware.org; spf=none smtp.mailfrom=gjlay.de ARC-Filter: OpenARC Filter v1.0.0 sourceware.org E019A3858C32 Authentication-Results: server2.sourceware.org; arc=pass smtp.remote-ip=81.169.146.160 ARC-Seal: i=2; a=rsa-sha256; d=sourceware.org; s=key; t=1709494952; cv=pass; b=cPX1VyZWxCnUaIkjpIUqu+43zEOTUpgwq9Y7XLI+6h1y+7Puuybx7Ka1OgFnjNBAl1lBhrJQHmaU9ZUl2I/o6iOYjT1GiWTMbs/lyaaB2zR5tg49vHJ/3wxSSt2ao3hD/dXnTzDHR9sndn4cSPxFa4q2pbivrIZS678bBb/2rWU= ARC-Message-Signature: i=2; a=rsa-sha256; d=sourceware.org; s=key; t=1709494952; c=relaxed/simple; bh=QKKeNytDNfI/dg19wn6oBbR+70JpsDUUC5lFoQIByRg=; h=DKIM-Signature:DKIM-Signature:Message-ID:Date:MIME-Version:From: To:Subject; b=AwnZ2zKycE/FgA5Kf6YHaF8uLhgvk/FGPJYplb37qWOt7L8dv2AsPAfUBQfSA2X8ScPeSBA+1e4iHU3koyZShE6kvphytHuYiA0s/8/YSkCipPfczOlbX2liEeQIXG8V78AarX/Dpp91behq/RBGnxwTi0lIKKkAYzymdcXRbfA= ARC-Authentication-Results: i=2; server2.sourceware.org ARC-Seal: i=1; a=rsa-sha256; t=1709494944; cv=none; d=strato.com; s=strato-dkim-0002; b=edpfsY0mxnnUvmH8NtUReGb0O2iB93QOtV1ngDs58kOe+3dFPOna0aH4vmFS3C0UHN eAvZMJPzxwwUGqLVymiRGv7CTmx3/B7qCSxyt5lNqFT+HFmJHM9w6d1pcvpd8E3988T/ zfK2CcHxaaz+f7lsmOhymIhJP/5JrXRcBTjo/c6oqnFtCUXDfmtdNjPKQji+rk4IUFx5 Fs5zMEY5+MVw9Z9eBtH3pQfPQopTn2yAwxitvC2QRbPsdUWZEd1Fc+d2NuSDQunBf+2a Qx825rlP0yJ8sb/rqnP015brPfAb5ccX5aj2+5eOQLCvLAjR2GT1fgG0x2mOMnTCb5a0 XUsA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; t=1709494944; s=strato-dkim-0002; d=strato.com; h=Subject:To:From:Date:Message-ID:Cc:Date:From:Subject:Sender; bh=4zk+HYKheKNZXmRa5DonpxyeIspBYkw8h53hY1DJXWU=; b=oNEBI+/PGTUWQRwNNSFwGe3amhaiBNeWGz/xPbzeTzwxpRhjXZijohgrCWouqVbksb 0cds6LPjb9kiCsLMhXcRn4++c8W1urz3fcy4rNWu1uiFScSQQxWKBaq24YvDJgzaGra9 FU3bz56S3O3OIsa50tV3KHcR2hxn+vB/5f5JrpzjY7JC9vtr3uU+QNaRlMDXyeptlmgH KctE7xIGyHGot98lNRSVxixADnxTPF3RA8b3l1hZJC6AowFo8k7oyUVUgorbGEG/IBnM GlQzyl6MbISvGZdeW8Lq86Sw4oCEOt0wgapFG2D5/xYDEvz/ee+dTBayRD7Ji27DVis/ htSA== ARC-Authentication-Results: i=1; strato.com; arc=none; dkim=none X-RZG-CLASS-ID: mo00 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; t=1709494944; s=strato-dkim-0002; d=gjlay.de; h=Subject:To:From:Date:Message-ID:Cc:Date:From:Subject:Sender; bh=4zk+HYKheKNZXmRa5DonpxyeIspBYkw8h53hY1DJXWU=; b=LxJ43ZuDHi43gMvTAwJwPX2L4wOWKIA4V6O2E3+09rkZj+KP9do9Os4rYYrBUKm4r5 KwLkcewm8nMZEjZdOMNYxDiY/aiXgpez1yp/d5NrjYwGz4lKxR3hWTvbl+bBCNQ6dMpc Z5BDI4cH0bFV+f0odp1OJh2bPpeGrNqhdA/mBHsK2YZ8iIdbXWA+VlAg8SLyAJJYe86s gnlfbINQPPnT3lnYzdwjHZFQjiTFb9Lwtg41MrCEoC8iQ4zxcaKi547lbTRbqPnAL7z2 nrEEqtAPA+565vXUg/0U0bjkzJ15PCCgsqKz4km9IrRZ6Ud9oCKp0sNxTiyJGTIBaqpo dn3g== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; t=1709494944; s=strato-dkim-0003; d=gjlay.de; h=Subject:To:From:Date:Message-ID:Cc:Date:From:Subject:Sender; bh=4zk+HYKheKNZXmRa5DonpxyeIspBYkw8h53hY1DJXWU=; b=qAZWeYXKO1xi30zqMx8STFHdVr11ZR7TUZ7YwmcTx5x9EYkmU8Owt4Vpm2+sXtRN4Q QFmToYkKpXs0cFipy9AQ== X-RZG-AUTH: ":LXoWVUeid/7A29J/hMvvT3koxZnKT7Qq0xotTetVnKkSgcSjpmy9KwoMJ/K0VA==" Received: from [192.168.2.102] by smtp.strato.de (RZmta 50.2.0 DYNA|AUTH) with ESMTPSA id Jdfd10023JgN7GP (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256 bits)) (Client did not present a certificate) for ; Sun, 3 Mar 2024 20:42:23 +0100 (CET) Message-ID: Date: Sun, 3 Mar 2024 20:42:22 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US From: Georg-Johann Lay To: "gcc-patches@gcc.gnu.org" Subject: [patch,avr,applied] Use more C++ ish coding style. X-Spam-Status: No, score=-11.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org This is a no-op patch that uses some more C++ / C99 features if possible. Johann --- AVR: Use more C++ ish coding style. gcc/ * config/avr/avr.cc: Resolve ATTRIBUTE_UNUSED. Use bool in place of int for boolean logic (if possible). Move declarations to definitions (if possible). * config/avr/avr.md: Use C++ comments. Fix some indentation glitches. * config/avr/avr-dimode.md: Same. * config/avr/constraints.md: Same. * config/avr/predicates.md: Same. diff --git a/gcc/config/avr/avr-dimode.md b/gcc/config/avr/avr-dimode.md index 6fcabdaaf6e..4b74e77e5e5 100644 --- a/gcc/config/avr/avr-dimode.md +++ b/gcc/config/avr/avr-dimode.md @@ -43,8 +43,8 @@ ;; so that no DImode insn contains pseudos or needs reloading. (define_constants - [(ACC_A 18) - (ACC_B 10)]) + [(ACC_A 18) + (ACC_B 10)]) ;; Supported modes that are 8 bytes wide (define_mode_iterator ALL8 [DI DQ UDQ DA UDA TA UTA]) diff --git a/gcc/config/avr/avr.cc b/gcc/config/avr/avr.cc index 7df21432dda..c8b2b504e3f 100644 --- a/gcc/config/avr/avr.cc +++ b/gcc/config/avr/avr.cc @@ -163,7 +163,7 @@ static int avr_operand_rtx_cost (rtx, machine_mode, enum rtx_code, int, bool); static void output_reload_in_const (rtx *, rtx, int *, bool); static struct machine_function *avr_init_machine_status (void); -static int _reg_unused_after (rtx_insn *insn, rtx reg, bool look_at_insn); +static bool _reg_unused_after (rtx_insn *insn, rtx reg, bool look_at_insn); /* Prototypes for hook implementors if needed before their implementation. */ @@ -648,8 +648,6 @@ avr_optimize_casesi (rtx_insn *insns[5], rtx *xop) start_sequence(); - rtx_insn *seq1, *seq2, *last1, *last2; - rtx reg = copy_to_mode_reg (mode, xop[10]); rtx (*gen_add)(rtx,rtx,rtx) = QImode == mode ? gen_addqi3 : gen_addhi3; @@ -665,8 +663,8 @@ avr_optimize_casesi (rtx_insn *insns[5], rtx *xop) JUMP_LABEL (cbranch) = xop[4]; ++LABEL_NUSES (xop[4]); - seq1 = get_insns(); - last1 = get_last_insn(); + rtx_insn *seq1 = get_insns(); + rtx_insn *last1 = get_last_insn(); end_sequence(); emit_insn_after (seq1, insns[2]); @@ -686,8 +684,8 @@ avr_optimize_casesi (rtx_insn *insns[5], rtx *xop) emit_insn (pat_4); - seq2 = get_insns(); - last2 = get_last_insn(); + rtx_insn *seq2 = get_insns(); + rtx_insn *last2 = get_last_insn(); end_sequence(); emit_insn_after (seq2, insns[3]); @@ -1309,7 +1307,7 @@ avr_mem_memx_p (rtx x) /* A helper for the subsequent function attribute used to dig for attribute 'name' in a FUNCTION_DECL or FUNCTION_TYPE */ -static inline int +static inline bool avr_lookup_function_attribute1 (const_tree func, const char *name) { if (FUNCTION_DECL == TREE_CODE (func)) @@ -1329,7 +1327,7 @@ avr_lookup_function_attribute1 (const_tree func, const char *name) /* Return nonzero if FUNC is a naked function. */ -static int +static bool avr_naked_function_p (tree func) { return avr_lookup_function_attribute1 (func, "naked"); @@ -1338,7 +1336,7 @@ avr_naked_function_p (tree func) /* Return nonzero if FUNC is an interrupt function as specified by the "interrupt" attribute. */ -static int +static bool avr_interrupt_function_p (tree func) { return avr_lookup_function_attribute1 (func, "interrupt"); @@ -1347,7 +1345,7 @@ avr_interrupt_function_p (tree func) /* Return nonzero if FUNC is a signal function as specified by the "signal" attribute. */ -static int +static bool avr_signal_function_p (tree func) { return avr_lookup_function_attribute1 (func, "signal"); @@ -1355,7 +1353,7 @@ avr_signal_function_p (tree func) /* Return nonzero if FUNC is an OS_task function. */ -static int +static bool avr_OS_task_function_p (tree func) { return avr_lookup_function_attribute1 (func, "OS_task"); @@ -1363,7 +1361,7 @@ avr_OS_task_function_p (tree func) /* Return nonzero if FUNC is an OS_main function. */ -static int +static bool avr_OS_main_function_p (tree func) { return avr_lookup_function_attribute1 (func, "OS_main"); @@ -1373,7 +1371,7 @@ avr_OS_main_function_p (tree func) /* Return nonzero if FUNC is a no_gccisr function as specified by the "no_gccisr" attribute. */ -static int +static bool avr_no_gccisr_function_p (tree func) { return avr_lookup_function_attribute1 (func, "no_gccisr"); @@ -1536,12 +1534,11 @@ avr_starting_frame_offset (void) static int avr_regs_to_save (HARD_REG_SET *set) { - int count; + int count = 0; int int_or_sig_p = cfun->machine->is_interrupt || cfun->machine->is_signal; if (set) CLEAR_HARD_REG_SET (*set); - count = 0; /* No need to save any registers if the function never returns or has the "OS_task" or "OS_main" attribute. */ @@ -1589,7 +1586,7 @@ avr_allocate_stack_slots_for_args (void) /* Return true if register FROM can be eliminated via register TO. */ static bool -avr_can_eliminate (const int from ATTRIBUTE_UNUSED, const int to) +avr_can_eliminate (const int /*from*/, const int to) { return ((frame_pointer_needed && to == FRAME_POINTER_REGNUM) || !frame_pointer_needed); @@ -2546,12 +2543,10 @@ emit_push_byte (unsigned regno, bool frame_related_p) static void emit_push_sfr (rtx sfr, bool frame_related_p, bool clr_p, int treg) { - rtx_insn *insn; - gcc_assert (MEM_P (sfr)); /* IN treg, IO(SFR) */ - insn = emit_move_insn (all_regs_rtx[treg], sfr); + rtx_insn *insn = emit_move_insn (all_regs_rtx[treg], sfr); if (frame_related_p) RTX_FRAME_RELATED_P (insn) = 1; @@ -2592,7 +2587,7 @@ avr_prologue_setup_frame (HOST_WIDE_INT size, HARD_REG_SET set) || live_seq > 7)) { rtx pattern; - int first_reg, reg, offset; + int reg, offset; emit_move_insn (gen_rtx_REG (HImode, REG_X), gen_int_mode (size, HImode)); @@ -2620,7 +2615,7 @@ avr_prologue_setup_frame (HOST_WIDE_INT size, HARD_REG_SET set) /* Note that live_seq always contains r28+r29, but the other registers to be saved are all below 18. */ - first_reg = (LAST_CALLEE_SAVED_REG + 1) - (live_seq - 2); + int first_reg = (LAST_CALLEE_SAVED_REG + 1) - (live_seq - 2); for (reg = REG_29, offset = -live_seq + 1; reg >= first_reg; @@ -2686,15 +2681,15 @@ avr_prologue_setup_frame (HOST_WIDE_INT size, HARD_REG_SET set) int irq_state = -1; HOST_WIDE_INT size_cfa = size, neg_size; rtx_insn *fp_plus_insns; - rtx fp, my_fp; gcc_assert (frame_pointer_needed || !isr_p || !crtl->is_leaf); - fp = my_fp = (frame_pointer_needed - ? frame_pointer_rtx - : gen_rtx_REG (Pmode, REG_X)); + rtx my_fp = (frame_pointer_needed + ? frame_pointer_rtx + : gen_rtx_REG (Pmode, REG_X)); + rtx fp = my_fp; if (AVR_HAVE_8BIT_SP) { @@ -2844,9 +2839,7 @@ void avr_expand_prologue (void) { HARD_REG_SET set; - HOST_WIDE_INT size; - - size = get_frame_size() + avr_outgoing_args_size(); + HOST_WIDE_INT size = get_frame_size() + avr_outgoing_args_size(); cfun->machine->stack_usage = 0; @@ -2999,7 +2992,7 @@ avr_asm_function_end_prologue (FILE *file) /* Worker function for `EPILOGUE_USES'. */ int -avr_epilogue_uses (int regno ATTRIBUTE_UNUSED) +avr_epilogue_uses (int /*regno*/) { if (reload_completed && cfun->machine @@ -3013,11 +3006,9 @@ avr_epilogue_uses (int regno ATTRIBUTE_UNUSED) static void emit_pop_byte (unsigned regno) { - rtx mem, reg; - - mem = gen_rtx_PRE_INC (HImode, stack_pointer_rtx); + rtx mem = gen_rtx_PRE_INC (HImode, stack_pointer_rtx); mem = gen_frame_mem (QImode, mem); - reg = gen_rtx_REG (QImode, regno); + rtx reg = gen_rtx_REG (QImode, regno); emit_insn (gen_rtx_SET (reg, mem)); } @@ -3027,13 +3018,10 @@ emit_pop_byte (unsigned regno) void avr_expand_epilogue (bool sibcall_p) { - int live_seq; HARD_REG_SET set; - int minimize; - HOST_WIDE_INT size; bool isr_p = cfun->machine->is_interrupt || cfun->machine->is_signal; - size = get_frame_size() + avr_outgoing_args_size(); + HOST_WIDE_INT size = get_frame_size() + avr_outgoing_args_size(); /* epilogue: naked */ if (cfun->machine->is_naked) @@ -3045,14 +3033,14 @@ avr_expand_epilogue (bool sibcall_p) } avr_regs_to_save (&set); - live_seq = sequent_regs_live (); + int live_seq = sequent_regs_live (); - minimize = (TARGET_CALL_PROLOGUES - && live_seq - && !isr_p - && !cfun->machine->is_OS_task - && !cfun->machine->is_OS_main - && !AVR_TINY); + bool minimize = (TARGET_CALL_PROLOGUES + && live_seq + && !isr_p + && !cfun->machine->is_OS_task + && !cfun->machine->is_OS_main + && !AVR_TINY); if (minimize && (live_seq > 4 @@ -3081,17 +3069,15 @@ avr_expand_epilogue (bool sibcall_p) /* Try two methods to adjust stack and select shortest. */ int irq_state = -1; - rtx fp, my_fp; - rtx_insn *fp_plus_insns; - HOST_WIDE_INT size_max; gcc_assert (frame_pointer_needed || !isr_p || !crtl->is_leaf); - fp = my_fp = (frame_pointer_needed - ? frame_pointer_rtx - : gen_rtx_REG (Pmode, REG_X)); + rtx my_fp = (frame_pointer_needed + ? frame_pointer_rtx + : gen_rtx_REG (Pmode, REG_X)); + rtx fp = my_fp; if (AVR_HAVE_8BIT_SP) { @@ -3103,7 +3089,7 @@ avr_expand_epilogue (bool sibcall_p) /* For rationale see comment in prologue generation. */ - size_max = (HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (my_fp)); + HOST_WIDE_INT size_max = (HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (my_fp)); if (size > size_max) size = size_max; size = trunc_int_for_mode (size, GET_MODE (my_fp)); @@ -3128,21 +3114,19 @@ avr_expand_epilogue (bool sibcall_p) emit_insn (gen_movhi_sp_r (stack_pointer_rtx, fp, GEN_INT (irq_state))); - fp_plus_insns = get_insns (); + rtx_insn *fp_plus_insns = get_insns (); end_sequence (); /********** Method 2: Adjust Stack pointer **********/ if (avr_sp_immediate_operand (gen_int_mode (size, HImode), HImode)) { - rtx_insn *sp_plus_insns; - start_sequence (); emit_move_insn (stack_pointer_rtx, plus_constant (Pmode, stack_pointer_rtx, size)); - sp_plus_insns = get_insns (); + rtx_insn *sp_plus_insns = get_insns (); end_sequence (); /************ Use shortest method ************/ @@ -3177,7 +3161,7 @@ avr_expand_epilogue (bool sibcall_p) CLEAR_HARD_REG_BIT (set, treg); } - for (int reg = 31; reg >= 0; --reg) + for (int reg = REG_31; reg >= REG_0; --reg) if (TEST_HARD_REG_BIT (set, reg)) emit_pop_byte (reg); @@ -3261,21 +3245,16 @@ avr_cannot_modify_jumps_p (void) /* Naked Functions must not have any instructions after their epilogue, see PR42240 */ - if (reload_completed - && cfun->machine - && cfun->machine->is_naked) - { - return true; - } - - return false; + return (reload_completed + && cfun->machine + && cfun->machine->is_naked); } /* Implement `TARGET_MODE_DEPENDENT_ADDRESS_P'. */ static bool -avr_mode_dependent_address_p (const_rtx addr ATTRIBUTE_UNUSED, addr_space_t as) +avr_mode_dependent_address_p (const_rtx /*addr*/, addr_space_t as) { /* FIXME: Non-generic addresses are not mode-dependent in themselves. This hook just serves to hack around PR rtl-optimization/52543 by @@ -3480,9 +3459,8 @@ avr_legitimize_address (rtx x, rtx oldx, machine_mode mode) than 63 bytes or for R++ or --R addressing. */ rtx -avr_legitimize_reload_address (rtx *px, machine_mode mode, - int opnum, int type, int addr_type, - int ind_levels ATTRIBUTE_UNUSED, +avr_legitimize_reload_address (rtx *px, machine_mode mode, int opnum, + int type, int addr_type, int /*ind_levels*/, rtx (*mk_memloc)(rtx,int)) { rtx x = *px; @@ -3948,9 +3926,8 @@ avr_print_operand (FILE *file, rtx x, int code) static bool avr_use_by_pieces_infrastructure_p (unsigned HOST_WIDE_INT size, - unsigned int align ATTRIBUTE_UNUSED, - enum by_pieces_operation op, - bool speed_p) + unsigned int align, + enum by_pieces_operation op, bool speed_p) { if (op != MOVE_BY_PIECES || (speed_p && size > MOVE_MAX_PIECES)) @@ -4090,8 +4067,8 @@ ret_cond_branch (rtx x, int len, int reverse) /* Output insn cost for next insn. */ void -avr_final_prescan_insn (rtx_insn *insn, rtx *operand ATTRIBUTE_UNUSED, - int num_operands ATTRIBUTE_UNUSED) +avr_final_prescan_insn (rtx_insn *insn, rtx * /*operands*/, + int /*num_operands*/) { if (avr_log.rtx_costs) { @@ -4150,7 +4127,7 @@ avr_function_arg_regno_p (int r) void avr_init_cumulative_args (CUMULATIVE_ARGS *cum, tree fntype, rtx libname, - tree fndecl ATTRIBUTE_UNUSED) + tree /*fndecl*/) { cum->nregs = AVR_TINY ? 1 + REG_25 - REG_20 : 1 + REG_25 - REG_8; cum->regno = FIRST_CUM_REG; @@ -4168,12 +4145,9 @@ avr_init_cumulative_args (CUMULATIVE_ARGS *cum, tree fntype, rtx libname, static int avr_num_arg_regs (machine_mode mode, const_tree type) { - int size; - - if (mode == BLKmode) - size = int_size_in_bytes (type); - else - size = GET_MODE_SIZE (mode); + int size = (mode == BLKmode + ? int_size_in_bytes (type) + : GET_MODE_SIZE (mode)); /* Align all function arguments to start in even-numbered registers. Odd-sized arguments leave holes above them. */ @@ -4206,8 +4180,7 @@ avr_function_arg (cumulative_args_t cum_v, const function_arg_info &arg) in the argument list. */ static void -avr_function_arg_advance (cumulative_args_t cum_v, - const function_arg_info &arg) +avr_function_arg_advance (cumulative_args_t cum_v, const function_arg_info &arg) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); int bytes = avr_num_arg_regs (arg.mode, arg.type); @@ -4261,8 +4234,6 @@ avr_function_arg_advance (cumulative_args_t cum_v, static bool avr_function_ok_for_sibcall (tree decl_callee, tree exp_callee) { - tree fntype_callee; - /* Tail-calling must fail if callee-saved regs are used to pass function args. We must not tail-call when `epilogue_restores' is used. Unfortunately, we cannot tell at this point if that @@ -4275,7 +4246,7 @@ avr_function_ok_for_sibcall (tree decl_callee, tree exp_callee) return false; } - fntype_callee = TREE_TYPE (CALL_EXPR_FN (exp_callee)); + tree fntype_callee = TREE_TYPE (CALL_EXPR_FN (exp_callee)); if (decl_callee) { @@ -4496,10 +4467,7 @@ avr_out_lpm (rtx_insn *insn, rtx *op, int *plen) rtx xop[7]; rtx dest = op[0]; rtx src = SET_SRC (single_set (insn)); - rtx addr; int n_bytes = GET_MODE_SIZE (GET_MODE (dest)); - int segment; - RTX_CODE code; addr_space_t as = MEM_ADDR_SPACE (src); if (plen) @@ -4513,8 +4481,8 @@ avr_out_lpm (rtx_insn *insn, rtx *op, int *plen) return ""; } - addr = XEXP (src, 0); - code = GET_CODE (addr); + rtx addr = XEXP (src, 0); + RTX_CODE code = GET_CODE (addr); gcc_assert (REG_P (dest)); gcc_assert (REG == code || POST_INC == code); @@ -4526,7 +4494,7 @@ avr_out_lpm (rtx_insn *insn, rtx *op, int *plen) xop[5] = tmp_reg_rtx; xop[6] = XEXP (rampz_rtx, 0); - segment = avr_addrspace[as].segment; + int segment = avr_addrspace[as].segment; /* Set RAMPZ as needed. */ @@ -4663,7 +4631,7 @@ avr_out_lpm (rtx_insn *insn, rtx *op, int *plen) /* Worker function for xload_8 insn. */ const char * -avr_out_xload (rtx_insn *insn ATTRIBUTE_UNUSED, rtx *op, int *plen) +avr_out_xload (rtx_insn * /*insn*/, rtx *op, int *plen) { rtx xop[4]; @@ -4960,14 +4928,13 @@ avr_out_movhi_r_mr_reg_disp_tiny (rtx_insn *insn, rtx op[], int *plen) static const char * avr_out_movhi_r_mr_pre_dec_tiny (rtx_insn *insn, rtx op[], int *plen) { - int mem_volatile_p = 0; rtx dest = op[0]; rtx src = op[1]; rtx base = XEXP (src, 0); /* "volatile" forces reading low byte first, even if less efficient, for correct operation with 16-bit I/O registers. */ - mem_volatile_p = MEM_VOLATILE_P (src); + bool mem_volatile_p = MEM_VOLATILE_P (src); if (reg_overlap_mentioned_p (dest, XEXP (base, 0))) fatal_insn ("incorrect insn:", insn); @@ -4993,7 +4960,7 @@ out_movhi_r_mr (rtx_insn *insn, rtx op[], int *plen) int reg_base = true_regnum (base); /* "volatile" forces reading low byte first, even if less efficient, for correct operation with 16-bit I/O registers. */ - int mem_volatile_p = MEM_VOLATILE_P (src); + bool mem_volatile_p = MEM_VOLATILE_P (src); if (reg_base > 0) { @@ -6306,7 +6273,7 @@ avr_out_movhi_mr_r_xmega (rtx_insn *insn, rtx op[], int *plen) /* "volatile" forces writing low byte first, even if less efficient, for correct operation with 16-bit I/O registers like SP. */ - int mem_volatile_p = MEM_VOLATILE_P (dest); + bool mem_volatile_p = MEM_VOLATILE_P (dest); if (CONSTANT_ADDRESS_P (base)) { @@ -6413,7 +6380,7 @@ avr_out_movhi_mr_r_reg_no_disp_tiny (rtx_insn *insn, rtx op[], int *plen) rtx base = XEXP (dest, 0); int reg_base = true_regnum (base); int reg_src = true_regnum (src); - int mem_volatile_p = MEM_VOLATILE_P (dest); + bool mem_volatile_p = MEM_VOLATILE_P (dest); if (reg_base == reg_src) { @@ -6481,7 +6448,6 @@ out_movhi_mr_r (rtx_insn *insn, rtx op[], int *plen) rtx base = XEXP (dest, 0); int reg_base = true_regnum (base); int reg_src = true_regnum (src); - int mem_volatile_p; /* "volatile" forces writing high-byte first (no-xmega) resp. low-byte first (xmega) even if less efficient, for correct @@ -6490,7 +6456,7 @@ out_movhi_mr_r (rtx_insn *insn, rtx op[], int *plen) if (AVR_XMEGA) return avr_out_movhi_mr_r_xmega (insn, op, plen); - mem_volatile_p = MEM_VOLATILE_P (dest); + bool mem_volatile_p = MEM_VOLATILE_P (dest); if (CONSTANT_ADDRESS_P (base)) { @@ -6937,9 +6903,6 @@ avr_out_compare (rtx_insn *insn, rtx *xop, int *plen) rtx xreg = xop[0]; rtx xval = xop[1]; - /* MODE of the comparison. */ - machine_mode mode; - /* Number of bytes to operate on. */ int n_bytes = GET_MODE_SIZE (GET_MODE (xreg)); @@ -6955,7 +6918,8 @@ avr_out_compare (rtx_insn *insn, rtx *xop, int *plen) xval = avr_to_int_mode (xop[1]); } - mode = GET_MODE (xreg); + /* MODE of the comparison. */ + machine_mode mode = GET_MODE (xreg); gcc_assert (REG_P (xreg)); gcc_assert ((CONST_INT_P (xval) && n_bytes <= 4) @@ -7119,11 +7083,7 @@ avr_out_compare (rtx_insn *insn, rtx *xop, int *plen) const char * avr_out_compare64 (rtx_insn *insn, rtx *op, int *plen) { - rtx xop[3]; - - xop[0] = gen_rtx_REG (DImode, ACC_A); - xop[1] = op[0]; - xop[2] = op[1]; + rtx xop[3] = { gen_rtx_REG (DImode, ACC_A), op[0], op[1] }; return avr_out_compare (insn, xop, plen); } @@ -10506,7 +10466,7 @@ avr_out_fract (rtx_insn *insn, rtx operands[], bool intsigned, int *plen) preparing operands for calls to `avr_out_plus' and `avr_out_bitop'. */ const char * -avr_out_round (rtx_insn *insn ATTRIBUTE_UNUSED, rtx *xop, int *plen) +avr_out_round (rtx_insn * /*insn*/, rtx *xop, int *plen) { scalar_mode mode = as_a (GET_MODE (xop[0])); scalar_int_mode imode = int_mode_for_mode (mode).require (); @@ -10577,7 +10537,6 @@ avr_rotate_bytes (rtx operands[]) /* Work out if byte or word move is needed. Odd byte rotates need QImode. Word move if no scratch is needed, otherwise use size of scratch. */ machine_mode move_mode = QImode; - int move_size, offset, size; if (num & 0xf) move_mode = QImode; @@ -10596,11 +10555,11 @@ avr_rotate_bytes (rtx operands[]) && QImode == move_mode) scratch = simplify_gen_subreg (move_mode, scratch, HImode, 0); - move_size = GET_MODE_SIZE (move_mode); + int move_size = GET_MODE_SIZE (move_mode); /* Number of bytes/words to rotate. */ - offset = (num >> 3) / move_size; + int offset = (num >> 3) / move_size; /* Number of moves needed. */ - size = GET_MODE_SIZE (mode) / move_size; + int size = GET_MODE_SIZE (mode) / move_size; /* Himode byte swap is special case to avoid a scratch register. */ if (mode == HImode && same_reg) { @@ -10718,7 +10677,6 @@ int avr_adjust_insn_length (rtx_insn *insn, int len) { rtx *op = recog_data.operand; - enum attr_adjust_len adjust_len; /* As we pretend jump tables in .text, fix branch offsets crossing jump tables now. */ @@ -10738,7 +10696,7 @@ avr_adjust_insn_length (rtx_insn *insn, int len) /* Read from insn attribute "adjust_len" if/how length is to be adjusted. */ - adjust_len = get_attr_adjust_len (insn); + enum attr_adjust_len adjust_len = get_attr_adjust_len (insn); if (adjust_len == ADJUST_LEN_NO) { @@ -10831,7 +10789,7 @@ reg_unused_after (rtx_insn *insn, rtx reg) We assume REG is a reload reg, and therefore does not live past labels. It may live past calls or jumps though. */ -int +bool _reg_unused_after (rtx_insn *insn, rtx reg, bool look_at_insn) { if (look_at_insn) @@ -10989,14 +10947,14 @@ avr_assemble_integer (rtx x, unsigned int size, int aligned_p) return default_assemble_integer (x, size, aligned_p); } -/* Implement TARGET_CLASS_MAX_NREGS. Reasons described in comments for +/* Implement `TARGET_CLASS_MAX_NREGS'. Reasons described in comments for avr_hard_regno_nregs. */ static unsigned char avr_class_max_nregs (reg_class_t rclass, machine_mode mode) { if (rclass == CC_REG && mode == CCmode) - return 1; + return 1; return CEIL (GET_MODE_SIZE (mode), UNITS_PER_WORD); } @@ -11010,8 +10968,8 @@ avr_class_max_nregs (reg_class_t rclass, machine_mode mode) static bool avr_class_likely_spilled_p (reg_class_t c) { - return (c != ALL_REGS && - (AVR_TINY ? 1 : c != ADDW_REGS)); + return (c != ALL_REGS + && (AVR_TINY ? 1 : c != ADDW_REGS)); } @@ -11028,10 +10986,8 @@ avr_class_likely_spilled_p (reg_class_t c) struct attribute_spec.handler. */ static tree -avr_handle_progmem_attribute (tree *node, tree name, - tree args ATTRIBUTE_UNUSED, - int flags ATTRIBUTE_UNUSED, - bool *no_add_attrs) +avr_handle_progmem_attribute (tree *node, tree name, tree args, + int /*flags*/, bool *no_add_attrs) { if (DECL_P (*node)) { @@ -11067,10 +11023,8 @@ avr_handle_progmem_attribute (tree *node, tree name, struct attribute_spec.handler. */ static tree -avr_handle_fndecl_attribute (tree *node, tree name, - tree args ATTRIBUTE_UNUSED, - int flags ATTRIBUTE_UNUSED, - bool *no_add_attrs) +avr_handle_fndecl_attribute (tree *node, tree name, tree /*args*/, + int /*flags*/, bool *no_add_attrs) { if (TREE_CODE (*node) != FUNCTION_DECL) { @@ -11083,10 +11037,8 @@ avr_handle_fndecl_attribute (tree *node, tree name, } static tree -avr_handle_fntype_attribute (tree *node, tree name, - tree args ATTRIBUTE_UNUSED, - int flags ATTRIBUTE_UNUSED, - bool *no_add_attrs) +avr_handle_fntype_attribute (tree *node, tree name, tree /*args*/, + int /*flags*/, bool *no_add_attrs) { if (TREE_CODE (*node) != FUNCTION_TYPE) { @@ -11126,7 +11078,7 @@ avr_handle_absdata_attribute (tree *node, tree name, tree /* args */, static tree avr_handle_addr_attribute (tree *node, tree name, tree args, - int flags ATTRIBUTE_UNUSED, bool *no_add) + int /*flags*/, bool *no_add) { bool io_p = startswith (IDENTIFIER_POINTER (name), "io"); HOST_WIDE_INT io_start = avr_arch->sfr_offset; @@ -11309,8 +11261,6 @@ avr_addr_space_zero_address_valid (addr_space_t) int avr_progmem_p (tree decl, tree attributes) { - tree a; - if (TREE_CODE (decl) != VAR_DECL) return 0; @@ -11324,7 +11274,7 @@ avr_progmem_p (tree decl, tree attributes) != lookup_attribute ("progmem", attributes)) return -1; - a = decl; + tree a = decl; do a = TREE_TYPE(a); @@ -11364,7 +11314,6 @@ avr_nonconst_pointer_addrspace (tree typ) if (POINTER_TYPE_P (typ)) { - addr_space_t as; tree target = TREE_TYPE (typ); /* Pointer to function: Test the function's return type. */ @@ -11379,7 +11328,7 @@ avr_nonconst_pointer_addrspace (tree typ) /* Pointers to non-generic address space must be const. */ - as = TYPE_ADDR_SPACE (target); + addr_space_t as = TYPE_ADDR_SPACE (target); if (!ADDR_SPACE_GENERIC_P (as) && !TYPE_READONLY (target) @@ -11498,7 +11447,6 @@ avr_insert_attributes (tree node, tree *attributes) && (TREE_STATIC (node) || DECL_EXTERNAL (node)) && avr_progmem_p (node, *attributes)) { - addr_space_t as; tree node0 = node; /* For C++, we have to peel arrays in order to get correct @@ -11511,7 +11459,7 @@ avr_insert_attributes (tree node, tree *attributes) if (error_mark_node == node0) return; - as = TYPE_ADDR_SPACE (TREE_TYPE (node)); + addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (node)); if (!TYPE_READONLY (node0) && !TREE_READONLY (node)) @@ -11752,7 +11700,7 @@ avr_asm_named_section (const char *name, unsigned int flags, tree decl) if (!avr_has_rodata_p) avr_has_rodata_p = (startswith (name, ".rodata") - || startswith (name, ".gnu.linkonce.r")); + || startswith (name, ".gnu.linkonce.r")); if (!avr_need_clear_bss_p) avr_need_clear_bss_p = startswith (name, ".bss"); @@ -12170,8 +12118,7 @@ avr_adjust_reg_alloc_order (void) /* Implement `TARGET_REGISTER_MOVE_COST' */ static int -avr_register_move_cost (machine_mode mode ATTRIBUTE_UNUSED, - reg_class_t from, reg_class_t to) +avr_register_move_cost (machine_mode /*mode*/, reg_class_t from, reg_class_t to) { return (from == STACK_REG ? 6 : to == STACK_REG ? 12 @@ -12182,9 +12129,7 @@ avr_register_move_cost (machine_mode mode ATTRIBUTE_UNUSED, /* Implement `TARGET_MEMORY_MOVE_COST' */ static int -avr_memory_move_cost (machine_mode mode, - reg_class_t rclass ATTRIBUTE_UNUSED, - bool in ATTRIBUTE_UNUSED) +avr_memory_move_cost (machine_mode mode, reg_class_t /*rclass*/, bool /*in*/) { return (mode == QImode ? 2 : mode == HImode ? 4 @@ -12283,7 +12228,6 @@ avr_operand_rtx_cost (rtx x, machine_mode mode, enum rtx_code outer, int opno, bool speed) { enum rtx_code code = GET_CODE (x); - int total; switch (code) { @@ -12300,7 +12244,7 @@ avr_operand_rtx_cost (rtx x, machine_mode mode, enum rtx_code outer, break; } - total = 0; + int total = 0; avr_rtx_costs (x, mode, outer, opno, &total, speed); return total; } @@ -12313,7 +12257,7 @@ avr_operand_rtx_cost (rtx x, machine_mode mode, enum rtx_code outer, static bool avr_rtx_costs_1 (rtx x, machine_mode mode, int outer_code, - int opno ATTRIBUTE_UNUSED, int *total, bool speed) + int /*opno*/, int *total, bool speed) { enum rtx_code code = GET_CODE (x); HOST_WIDE_INT val; @@ -13258,9 +13202,8 @@ avr_insn_cost (rtx_insn *insn, bool speed) /* Implement `TARGET_ADDRESS_COST'. */ static int -avr_address_cost (rtx x, machine_mode mode ATTRIBUTE_UNUSED, - addr_space_t as ATTRIBUTE_UNUSED, - bool speed ATTRIBUTE_UNUSED) +avr_address_cost (rtx x, machine_mode mode, addr_space_t /*as*/, + bool /*speed*/) { int cost = 4; @@ -13348,7 +13291,7 @@ avr_normalize_condition (RTX_CODE condition) static inline unsigned int avr_ret_register (void) { - return 24; + return REG_24; } @@ -13357,7 +13300,7 @@ avr_ret_register (void) static bool avr_function_value_regno_p (const unsigned int regno) { - return (regno == avr_ret_register ()); + return regno == avr_ret_register (); } @@ -13366,8 +13309,7 @@ avr_function_value_regno_p (const unsigned int regno) library function returns a value of mode MODE. */ static rtx -avr_libcall_value (machine_mode mode, - const_rtx func ATTRIBUTE_UNUSED) +avr_libcall_value (machine_mode mode, const_rtx /*func*/) { int offs = GET_MODE_SIZE (mode); @@ -13383,16 +13325,13 @@ avr_libcall_value (machine_mode mode, function returns a value of data type VALTYPE. */ static rtx -avr_function_value (const_tree type, - const_tree fn_decl_or_type ATTRIBUTE_UNUSED, - bool outgoing ATTRIBUTE_UNUSED) +avr_function_value (const_tree type, const_tree /*fn_decl_or_type*/, + bool /*outgoing*/) { - unsigned int offs; - if (TYPE_MODE (type) != BLKmode) return avr_libcall_value (TYPE_MODE (type), NULL_RTX); - offs = int_size_in_bytes (type); + unsigned int offs = int_size_in_bytes (type); if (offs < 2) offs = 2; if (offs > 2 && offs < GET_MODE_SIZE (SImode)) @@ -13562,9 +13501,8 @@ avr_hard_regno_call_part_clobbered (unsigned, unsigned regno, /* Implement `MODE_CODE_BASE_REG_CLASS'. */ enum reg_class -avr_mode_code_base_reg_class (machine_mode mode ATTRIBUTE_UNUSED, - addr_space_t as, RTX_CODE outer_code, - RTX_CODE index_code ATTRIBUTE_UNUSED) +avr_mode_code_base_reg_class (machine_mode /*mode*/, addr_space_t as, + RTX_CODE outer_code, RTX_CODE /*index_code*/) { if (!ADDR_SPACE_GENERIC_P (as)) { @@ -13586,11 +13524,9 @@ avr_mode_code_base_reg_class (machine_mode mode ATTRIBUTE_UNUSED, /* Implement `REGNO_MODE_CODE_OK_FOR_BASE_P'. */ bool -avr_regno_mode_code_ok_for_base_p (int regno, - machine_mode mode ATTRIBUTE_UNUSED, - addr_space_t as ATTRIBUTE_UNUSED, - RTX_CODE outer_code, - RTX_CODE index_code ATTRIBUTE_UNUSED) +avr_regno_mode_code_ok_for_base_p (int regno, machine_mode /*mode*/, + addr_space_t as, RTX_CODE outer_code, + RTX_CODE /*index_code*/) { bool ok = false; @@ -13718,14 +13654,13 @@ output_reload_in_const (rtx *op, rtx clobber_reg, int *len, bool clear_p) for (int n = 0; n < n_bytes; n++) { - int ldreg_p; bool done_byte = false; rtx xop[3]; /* Crop the n-th destination byte. */ xdest[n] = simplify_gen_subreg (QImode, dest, mode, n); - ldreg_p = test_hard_reg_class (LD_REGS, xdest[n]); + int ldreg_p = test_hard_reg_class (LD_REGS, xdest[n]); if (!CONST_INT_P (src) && !CONST_FIXED_P (src) @@ -13920,8 +13855,6 @@ output_reload_insisf (rtx *op, rtx clobber_reg, int *len) || CONST_FIXED_P (op[1]) || CONST_DOUBLE_P (op[1]))) { - int len_clr, len_noclr; - /* In some cases it is better to clear the destination beforehand, e.g. CLR R2 CLR R3 MOVW R4,R2 INC R2 @@ -13934,6 +13867,7 @@ output_reload_insisf (rtx *op, rtx clobber_reg, int *len) Instead, we call the print function twice to get the lengths of both methods and use the shortest one. */ + int len_clr, len_noclr; output_reload_in_const (op, clobber_reg, &len_clr, true); output_reload_in_const (op, clobber_reg, &len_noclr, false); @@ -14129,8 +14063,7 @@ avr_hard_regno_scratch_ok (unsigned int regno) /* Return nonzero if register OLD_REG can be renamed to register NEW_REG. */ int -avr_hard_regno_rename_ok (unsigned int old_reg, - unsigned int new_reg) +avr_hard_regno_rename_ok (unsigned int old_reg, unsigned int new_reg) { /* Interrupt functions can only use registers that have already been saved by the prologue, even if they would normally be @@ -14249,7 +14182,7 @@ avr_asm_out_dtor (rtx symbol, int priority) /* Implement `TARGET_RETURN_IN_MEMORY'. */ static bool -avr_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED) +avr_return_in_memory (const_tree type, const_tree /*fntype*/) { HOST_WIDE_INT size = int_size_in_bytes (type); HOST_WIDE_INT ret_size_limit = AVR_TINY ? 4 : 8; @@ -14444,7 +14377,6 @@ avr_addr_space_convert (rtx src, tree type_from, tree type_to) if (as_from != ADDR_SPACE_MEMX && as_to == ADDR_SPACE_MEMX) { - int msb; rtx sym = src; rtx reg = gen_reg_rtx (PSImode); @@ -14465,7 +14397,7 @@ avr_addr_space_convert (rtx src, tree type_from, tree type_to) /* Linearize memory: RAM has bit 23 set. */ - msb = ADDR_SPACE_GENERIC_P (as_from) + int msb = ADDR_SPACE_GENERIC_P (as_from) ? 0x80 : avr_addrspace[as_from].segment; @@ -14499,8 +14431,7 @@ avr_addr_space_convert (rtx src, tree type_from, tree type_to) /* Implement `TARGET_ADDR_SPACE_SUBSET_P'. */ static bool -avr_addr_space_subset_p (addr_space_t subset ATTRIBUTE_UNUSED, - addr_space_t superset ATTRIBUTE_UNUSED) +avr_addr_space_subset_p (addr_space_t /*subset*/, addr_space_t /*superset*/) { /* Allow any kind of pointer mess. */ @@ -14715,10 +14646,9 @@ avr_emit3_fix_outputs (rtx (*gen)(rtx,rtx,rtx), rtx *op, bool avr_emit_cpymemhi (rtx *xop) { - HOST_WIDE_INT count; machine_mode loop_mode; addr_space_t as = MEM_ADDR_SPACE (xop[1]); - rtx loop_reg, addr1, a_src, a_dest, insn, xas; + rtx loop_reg, addr1, insn; rtx a_hi8 = NULL_RTX; if (avr_mem_flash_p (xop[0])) @@ -14727,12 +14657,12 @@ avr_emit_cpymemhi (rtx *xop) if (!CONST_INT_P (xop[2])) return false; - count = INTVAL (xop[2]); + HOST_WIDE_INT count = INTVAL (xop[2]); if (count <= 0) return false; - a_src = XEXP (xop[1], 0); - a_dest = XEXP (xop[0], 0); + rtx a_src = XEXP (xop[1], 0); + rtx a_dest = XEXP (xop[0], 0); if (PSImode == GET_MODE (a_src)) { @@ -14766,7 +14696,7 @@ avr_emit_cpymemhi (rtx *xop) loop_reg = copy_to_mode_reg (loop_mode, gen_int_mode (count, loop_mode)); } - xas = GEN_INT (as); + rtx xas = GEN_INT (as); /* FIXME: Register allocator might come up with spill fails if it is left on its own. Thus, we allocate the pointer registers by hand: @@ -14819,20 +14749,16 @@ avr_emit_cpymemhi (rtx *xop) */ const char * -avr_out_cpymem (rtx_insn *insn ATTRIBUTE_UNUSED, rtx *op, int *plen) +avr_out_cpymem (rtx_insn * /*insn*/, rtx *op, int *plen) { addr_space_t as = (addr_space_t) INTVAL (op[0]); machine_mode loop_mode = GET_MODE (op[1]); bool sbiw_p = avr_adiw_reg_p (op[1]); - rtx xop[3]; + rtx xop[3] = { op[0], op[1], tmp_reg_rtx }; if (plen) *plen = 0; - xop[0] = op[0]; - xop[1] = op[1]; - xop[2] = tmp_reg_rtx; - /* Loop label */ avr_asm_len ("0:", xop, plen, 0); @@ -15238,7 +15164,6 @@ const char * avr_out_insert_bits (rtx *op, int *plen) { unsigned int map = UINTVAL (op[1]) & GET_MODE_MASK (SImode); - unsigned mask_fixed; bool fixp_p = true; rtx xop[4]; @@ -15256,7 +15181,7 @@ avr_out_insert_bits (rtx *op, int *plen) /* If MAP has fixed points it might be better to initialize the result with the bits to be inserted instead of moving all bits by hand. */ - mask_fixed = avr_map_metric (map, MAP_MASK_FIXED_0_7); + unsigned mask_fixed = avr_map_metric (map, MAP_MASK_FIXED_0_7); if (REGNO (xop[0]) == REGNO (xop[1])) { @@ -15347,7 +15272,7 @@ avr_bdesc[AVR_BUILTIN_COUNT] = /* Implement `TARGET_BUILTIN_DECL'. */ static tree -avr_builtin_decl (unsigned id, bool initialize_p ATTRIBUTE_UNUSED) +avr_builtin_decl (unsigned id, bool /*initialize_p*/) { if (id < AVR_BUILTIN_COUNT) return avr_bdesc[id].fndecl; @@ -15619,10 +15544,8 @@ avr_default_expand_builtin (enum insn_code icode, tree exp, rtx target) IGNORE is nonzero if the value is to be ignored. */ static rtx -avr_expand_builtin (tree exp, rtx target, - rtx subtarget ATTRIBUTE_UNUSED, - machine_mode mode ATTRIBUTE_UNUSED, - int ignore) +avr_expand_builtin (tree exp, rtx target, rtx /*subtarget*/, + machine_mode mode, int ignore) { tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); const char *bname = IDENTIFIER_POINTER (DECL_NAME (fndecl)); @@ -15775,8 +15698,7 @@ avr_fold_absfx (tree tval) /* Implement `TARGET_FOLD_BUILTIN'. */ static tree -avr_fold_builtin (tree fndecl, int n_args ATTRIBUTE_UNUSED, tree *arg, - bool ignore ATTRIBUTE_UNUSED) +avr_fold_builtin (tree fndecl, int /*n_args*/, tree *arg, bool /*ignore*/) { unsigned int fcode = DECL_MD_FUNCTION_CODE (fndecl); tree val_type = TREE_TYPE (TREE_TYPE (fndecl)); @@ -15837,9 +15759,7 @@ avr_fold_builtin (tree fndecl, int n_args ATTRIBUTE_UNUSED, tree *arg, { tree tbits = arg[1]; tree tval = arg[2]; - tree tmap; tree map_type = TREE_VALUE (TYPE_ARG_TYPES (TREE_TYPE (fndecl))); - unsigned int map; bool changed = false; avr_map_op_t best_g; @@ -15851,8 +15771,8 @@ avr_fold_builtin (tree fndecl, int n_args ATTRIBUTE_UNUSED, tree *arg, break; } - tmap = wide_int_to_tree (map_type, wi::to_wide (arg[0])); - map = TREE_INT_CST_LOW (tmap); + tree tmap = wide_int_to_tree (map_type, wi::to_wide (arg[0])); + unsigned int map = TREE_INT_CST_LOW (tmap); if (TREE_CODE (tval) != INTEGER_CST && avr_map_metric (map, MAP_MASK_PREIMAGE_F) == 0) diff --git a/gcc/config/avr/avr.md b/gcc/config/avr/avr.md index 7f73587940f..6606837b5f7 100644 --- a/gcc/config/avr/avr.md +++ b/gcc/config/avr/avr.md @@ -377,8 +377,8 @@ (define_expand "nonlocal_goto_receiver" rtx offset = gen_int_mode (targetm.starting_frame_offset (), Pmode); emit_move_insn (virtual_stack_vars_rtx, gen_rtx_PLUS (Pmode, hard_frame_pointer_rtx, offset)); - /* ; This might change the hard frame pointer in ways that aren't - ; apparent to early optimization passes, so force a clobber. */ + // This might change the hard frame pointer in ways that aren't + // apparent to early optimization passes, so force a clobber. emit_clobber (hard_frame_pointer_rtx); DONE; }) @@ -575,11 +575,10 @@ (define_insn_and_split "xload8_A" "&& 1" [(clobber (const_int 0))] { - /* ; Split away the high part of the address. GCC's register allocator - ; in not able to allocate segment registers and reload the resulting - ; expressions. Notice that no address register can hold a PSImode. */ + // Split away the high part of the address. GCC's register allocator + // in not able to allocate segment registers and reload the resulting + // expressions. Notice that no address register can hold a PSImode. - rtx_insn *insn; rtx addr = XEXP (operands[1], 0); rtx hi8 = gen_reg_rtx (QImode); rtx reg_z = gen_rtx_REG (HImode, REG_Z); @@ -587,7 +586,7 @@ (define_insn_and_split "xload8_A" emit_move_insn (reg_z, simplify_gen_subreg (HImode, addr, PSImode, 0)); emit_move_insn (hi8, simplify_gen_subreg (QImode, addr, PSImode, 2)); - insn = emit_insn (gen_xload_8 (operands[0], hi8)); + rtx_insn *insn = emit_insn (gen_xload_8 (operands[0], hi8)); set_mem_addr_space (SET_SRC (single_set (insn)), MEM_ADDR_SPACE (operands[1])); DONE; @@ -617,15 +616,15 @@ (define_insn_and_split "xload_A" addr_space_t as = MEM_ADDR_SPACE (operands[1]); rtx_insn *insn; - /* Split the address to R21:Z */ + // Split the address to R21:Z emit_move_insn (reg_z, simplify_gen_subreg (HImode, addr, PSImode, 0)); emit_move_insn (gen_rtx_REG (QImode, 21), addr_hi8); - /* Load with code from libgcc */ + // Load with code from libgcc. insn = emit_insn (gen_xload__libgcc ()); set_mem_addr_space (SET_SRC (single_set (insn)), as); - /* Move to destination */ + // Move to destination. emit_move_insn (operands[0], gen_rtx_REG (mode, 22)); DONE; @@ -721,7 +720,7 @@ (define_expand "mov" SUBREG_REG (src) = copy_to_mode_reg (GET_MODE (const_addr), const_addr); } - /* One of the operands has to be in a register. */ + // One of the operands has to be in a register. if (!register_operand (dest, mode) && !reg_or_0_operand (src, mode)) { @@ -736,8 +735,8 @@ (define_expand "mov" src = replace_equiv_address (src, copy_to_mode_reg (PSImode, addr)); if (!avr_xload_libgcc_p (mode)) - /* ; No here because gen_xload8_A only iterates over ALL1. - ; insn-emit does not depend on the mode, it's all about operands. */ + // No here because gen_xload8_A only iterates over ALL1. + // insn-emit does not depend on the mode, it's all about operands. emit_insn (gen_xload8qi_A (dest, src)); else emit_insn (gen_xload_A (dest, src)); @@ -747,7 +746,7 @@ (define_expand "mov" if (avr_load_libgcc_p (src)) { - /* For the small devices, do loads per libgcc call. */ + // For the small devices, do loads per libgcc call. emit_insn (gen_load_libgcc (dest, src)); DONE; } @@ -1291,21 +1290,18 @@ (define_expand "setmemhi" (clobber (match_dup 4))])] "" { - rtx addr0; - machine_mode mode; - - /* If value to set is not zero, use the library routine. */ + // If value to set is not zero, use the library routine. if (operands[2] != const0_rtx) FAIL; if (!CONST_INT_P (operands[1])) FAIL; - mode = u8_operand (operands[1], VOIDmode) ? QImode : HImode; + machine_mode mode = u8_operand (operands[1], VOIDmode) ? QImode : HImode; operands[4] = gen_rtx_SCRATCH (mode); operands[1] = copy_to_mode_reg (mode, gen_int_mode (INTVAL (operands[1]), mode)); - addr0 = copy_to_mode_reg (Pmode, XEXP (operands[0], 0)); + rtx addr0 = copy_to_mode_reg (Pmode, XEXP (operands[0], 0)); operands[0] = gen_rtx_MEM (BLKmode, addr0); }) @@ -1392,10 +1388,9 @@ (define_expand "strlenhi" (clobber (scratch:QI))])] "" { - rtx addr; if (operands[2] != const0_rtx) FAIL; - addr = copy_to_mode_reg (Pmode, XEXP (operands[1], 0)); + rtx addr = copy_to_mode_reg (Pmode, XEXP (operands[1], 0)); operands[1] = gen_rtx_MEM (BLKmode, addr); operands[5] = addr; operands[4] = gen_reg_rtx (HImode); @@ -1640,10 +1635,10 @@ (define_insn_and_split "*addhi3_sp" "" [(const_int 0)] { - /* Do not attempt to split this pattern. This FAIL is necessary - to prevent the splitter from matching *add3_split, splitting - it, and then failing later because constraints don't match, as split - does not look at constraints. */ + // Do not attempt to split this pattern. This FAIL is necessary + // to prevent the splitter from matching *add3_split, splitting + // it, and then failing later because constraints don't match, as split + // does not look at constraints. FAIL; } [(set_attr "length" "6") @@ -3221,10 +3216,10 @@ (define_expand "mulhi3" DONE; } - /* ; For small constants we can do better by extending them on the fly. - ; The constant can be loaded in one instruction and the widening - ; multiplication is shorter. First try the unsigned variant because it - ; allows constraint "d" instead of "a" for the signed version. */ + // For small constants we can do better by extending them on the fly. + // The constant can be loaded in one instruction and the widening + // multiplication is shorter. First try the unsigned variant because it + // allows constraint "d" instead of "a" for the signed version. */ if (s9_operand (operands[2], HImode)) { @@ -3415,8 +3410,8 @@ (define_insn_and_split "*mulusi3" (set (match_dup 0) (reg:SI 22))] { - /* Do the QI -> HI extension explicitely before the multiplication. */ - /* Do the HI -> SI extension implicitely and after the multiplication. */ + // Do the QI -> HI extension explicitely before the multiplication. + // Do the HI -> SI extension implicitely and after the multiplication. if (QImode == mode) operands[1] = gen_rtx_ZERO_EXTEND (HImode, operands[1]); @@ -3467,8 +3462,8 @@ (define_insn_and_split "*mulssi3" (set (match_dup 0) (reg:SI 22))] { - /* Do the QI -> HI extension explicitely before the multiplication. */ - /* Do the HI -> SI extension implicitely and after the multiplication. */ + // Do the QI -> HI extension explicitely before the multiplication. + // Do the HI -> SI extension implicitely and after the multiplication. if (QImode == mode) operands[1] = gen_rtx_SIGN_EXTEND (HImode, operands[1]); @@ -3581,8 +3576,8 @@ (define_insn_and_split rtx xop1 = operands[1]; rtx xop2 = operands[2]; - /* Do the QI -> HI extension explicitely before the multiplication. */ - /* Do the HI -> SI extension implicitely and after the multiplication. */ + // Do the QI -> HI extension explicitely before the multiplication. + // Do the HI -> SI extension implicitely and after the multiplication. if (QImode == mode) xop1 = gen_rtx_fmt_e (, HImode, xop1); @@ -3600,8 +3595,8 @@ (define_insn_and_split } else { - /* = SIGN_EXTEND */ - /* = ZERO_EXTEND */ + // = SIGN_EXTEND + // = ZERO_EXTEND operands[1] = xop2; operands[2] = xop1; @@ -4269,7 +4264,7 @@ (define_insn_and_split "divmodsi4" (match_operand:SI 2 "pseudo_register_operand"))) (set (match_operand:SI 3 "pseudo_register_operand") (mod:SI (match_dup 1) - (match_dup 2))) + (match_dup 2))) (clobber (reg:SI 18)) (clobber (reg:SI 22)) (clobber (reg:HI 26)) @@ -4926,7 +4921,7 @@ (define_expand "rotl3" else if (offset == 1 || offset == GET_MODE_BITSIZE (mode) -1) { - /*; Support rotate left/right by 1 */ + // Support rotate left/right by 1. emit_move_insn (operands[0], gen_rtx_ROTATE (mode, operands[1], operands[2])); @@ -5726,7 +5721,7 @@ (define_expand "lshr3" (lshiftrt:ALL1 (match_operand:ALL1 1 "register_operand" "") (match_operand:QI 2 "nop_general_operand" "")))]) -(define_split ; lshrqi3_const4 +(define_split ; lshrqi3_const4 [(set (match_operand:ALL1 0 "d_register_operand" "") (lshiftrt:ALL1 (match_dup 0) (const_int 4)))] @@ -5741,7 +5736,7 @@ (define_split ; lshrqi3_const4 operands[1] = avr_to_int_mode (operands[0]); }) -(define_split ; lshrqi3_const5 +(define_split ; lshrqi3_const5 [(set (match_operand:ALL1 0 "d_register_operand" "") (lshiftrt:ALL1 (match_dup 0) (const_int 5)))] @@ -5753,7 +5748,7 @@ (define_split ; lshrqi3_const5 operands[1] = avr_to_int_mode (operands[0]); }) -(define_split ; lshrqi3_const6 +(define_split ; lshrqi3_const6 [(set (match_operand:QI 0 "d_register_operand" "") (lshiftrt:QI (match_dup 0) (const_int 6)))] @@ -6160,17 +6155,17 @@ (define_insn "*negsi2" (define_insn_and_split "negsf2" [(set (match_operand:SF 0 "register_operand" "=d,r") - (neg:SF (match_operand:SF 1 "register_operand" "0,0")))] + (neg:SF (match_operand:SF 1 "register_operand" "0,0")))] "" "#" "&& reload_completed" [(parallel [(set (match_dup 0) - (neg:SF (match_dup 1))) + (neg:SF (match_dup 1))) (clobber (reg:CC REG_CC))])]) (define_insn "*negsf2" [(set (match_operand:SF 0 "register_operand" "=d,r") - (neg:SF (match_operand:SF 1 "register_operand" "0,0"))) + (neg:SF (match_operand:SF 1 "register_operand" "0,0"))) (clobber (reg:CC REG_CC))] "reload_completed" "@ @@ -7132,7 +7127,7 @@ (define_insn "jump" : "rjmp %x0"; } [(set (attr "length") - (if_then_else (match_operand 0 "symbol_ref_operand" "") + (if_then_else (match_operand 0 "symbol_ref_operand" "") (if_then_else (match_test "!AVR_HAVE_JMP_CALL") (const_int 1) (const_int 2)) @@ -7695,7 +7690,6 @@ (define_peephole ; "*dec-and-branchhi!=-1" (pc)))] "dead_or_set_regno_p (insn, REG_CC)" { - const char *op; int jump_mode; if (avr_adiw_reg_p (operands[0])) output_asm_insn ("sbiw %0,1", operands); @@ -7704,7 +7698,7 @@ (define_peephole ; "*dec-and-branchhi!=-1" "sbc %B0,__zero_reg__", operands); jump_mode = avr_jump_mode (operands[2], insn); - op = ((EQ == ) ^ (jump_mode == 1)) ? "brcc" : "brcs"; + const char *op = ((EQ == ) ^ (jump_mode == 1)) ? "brcc" : "brcs"; operands[1] = gen_rtx_CONST_STRING (VOIDmode, op); switch (jump_mode) @@ -7736,16 +7730,14 @@ (define_peephole ; "*dec-and-branchhi!=-1.d.clobber" (pc)))] "dead_or_set_regno_p (insn, REG_CC)" { - const char *op; - int jump_mode; if (avr_adiw_reg_p (operands[0])) output_asm_insn ("sbiw %0,1", operands); else output_asm_insn ("subi %A0,1" CR_TAB "sbc %B0,__zero_reg__", operands); - jump_mode = avr_jump_mode (operands[2], insn); - op = ((EQ == ) ^ (jump_mode == 1)) ? "brcc" : "brcs"; + int jump_mode = avr_jump_mode (operands[2], insn); + const char *op = ((EQ == ) ^ (jump_mode == 1)) ? "brcc" : "brcs"; operands[1] = gen_rtx_CONST_STRING (VOIDmode, op); switch (jump_mode) @@ -7777,14 +7769,12 @@ (define_peephole ; "*dec-and-branchhi!=-1.l.clobber" (pc)))] "dead_or_set_regno_p (insn, REG_CC)" { - const char *op; - int jump_mode; output_asm_insn ("ldi %3,1" CR_TAB "sub %A0,%3" CR_TAB "sbc %B0,__zero_reg__", operands); - jump_mode = avr_jump_mode (operands[2], insn); - op = ((EQ == ) ^ (jump_mode == 1)) ? "brcc" : "brcs"; + int jump_mode = avr_jump_mode (operands[2], insn); + const char *op = ((EQ == ) ^ (jump_mode == 1)) ? "brcc" : "brcs"; operands[1] = gen_rtx_CONST_STRING (VOIDmode, op); switch (jump_mode) @@ -7813,13 +7803,10 @@ (define_peephole ; "*dec-and-branchqi!=-1" (pc)))] "dead_or_set_regno_p (insn, REG_CC)" { - const char *op; - int jump_mode; - output_asm_insn ("subi %A0,1", operands); - jump_mode = avr_jump_mode (operands[1], insn); - op = ((EQ == ) ^ (jump_mode == 1)) ? "brcc" : "brcs"; + int jump_mode = avr_jump_mode (operands[1], insn); + const char *op = ((EQ == ) ^ (jump_mode == 1)) ? "brcc" : "brcs"; operands[0] = gen_rtx_CONST_STRING (VOIDmode, op); switch (jump_mode) @@ -7927,7 +7914,7 @@ (define_insn "cli_sei" [(unspec_volatile [(match_operand:QI 0 "const_int_operand" "L,P")] UNSPECV_ENABLE_IRQS) (set (match_operand:BLK 1 "" "") - (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER))] + (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER))] "" "@ cli @@ -8067,7 +8054,7 @@ (define_insn_and_split "delay_cycles_1" (const_int 1)] UNSPECV_DELAY_CYCLES) (set (match_operand:BLK 1 "" "") - (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER)) + (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER)) (clobber (match_scratch:QI 2 "=&d"))] "" "#" @@ -8085,7 +8072,7 @@ (define_insn "*delay_cycles_1" (const_int 1)] UNSPECV_DELAY_CYCLES) (set (match_operand:BLK 1 "" "") - (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER)) + (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER)) (clobber (match_scratch:QI 2 "=&d")) (clobber (reg:CC REG_CC))] "reload_completed" @@ -8099,7 +8086,7 @@ (define_insn_and_split "delay_cycles_2" (const_int 2)] UNSPECV_DELAY_CYCLES) (set (match_operand:BLK 1 "" "") - (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER)) + (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER)) (clobber (match_scratch:HI 2 "=&w,&d"))] "" "#" @@ -8119,7 +8106,7 @@ (define_insn "*delay_cycles_2" (const_int 2)] UNSPECV_DELAY_CYCLES) (set (match_operand:BLK 1 "" "") - (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER)) + (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER)) (clobber (match_scratch:HI 2 "=&w,&d")) (clobber (reg:CC REG_CC))] "reload_completed" @@ -8134,7 +8121,7 @@ (define_insn_and_split "delay_cycles_3" (const_int 3)] UNSPECV_DELAY_CYCLES) (set (match_operand:BLK 1 "" "") - (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER)) + (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER)) (clobber (match_scratch:QI 2 "=&d")) (clobber (match_scratch:QI 3 "=&d")) (clobber (match_scratch:QI 4 "=&d"))] @@ -8156,7 +8143,7 @@ (define_insn "*delay_cycles_3" (const_int 3)] UNSPECV_DELAY_CYCLES) (set (match_operand:BLK 1 "" "") - (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER)) + (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER)) (clobber (match_scratch:QI 2 "=&d")) (clobber (match_scratch:QI 3 "=&d")) (clobber (match_scratch:QI 4 "=&d")) @@ -8176,7 +8163,7 @@ (define_insn_and_split "delay_cycles_4" (const_int 4)] UNSPECV_DELAY_CYCLES) (set (match_operand:BLK 1 "" "") - (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER)) + (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER)) (clobber (match_scratch:QI 2 "=&d")) (clobber (match_scratch:QI 3 "=&d")) (clobber (match_scratch:QI 4 "=&d")) @@ -8200,7 +8187,7 @@ (define_insn "*delay_cycles_4" (const_int 4)] UNSPECV_DELAY_CYCLES) (set (match_operand:BLK 1 "" "") - (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER)) + (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER)) (clobber (match_scratch:QI 2 "=&d")) (clobber (match_scratch:QI 3 "=&d")) (clobber (match_scratch:QI 4 "=&d")) @@ -8781,7 +8768,7 @@ (define_insn "*nopv" [(unspec_volatile [(match_operand:SI 0 "const_int_operand" "P,K")] UNSPECV_NOP) (set (match_operand:BLK 1 "" "") - (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER))] + (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER))] "" "@ nop @@ -8803,7 +8790,7 @@ (define_expand "sleep" (define_insn "*sleep" [(unspec_volatile [(const_int 0)] UNSPECV_SLEEP) (set (match_operand:BLK 0 "" "") - (unspec_volatile:BLK [(match_dup 0)] UNSPECV_MEMORY_BARRIER))] + (unspec_volatile:BLK [(match_dup 0)] UNSPECV_MEMORY_BARRIER))] "" "sleep" [(set_attr "length" "1")]) @@ -8823,7 +8810,7 @@ (define_expand "wdr" (define_insn "*wdr" [(unspec_volatile [(const_int 0)] UNSPECV_WDR) (set (match_operand:BLK 0 "" "") - (unspec_volatile:BLK [(match_dup 0)] UNSPECV_MEMORY_BARRIER))] + (unspec_volatile:BLK [(match_dup 0)] UNSPECV_MEMORY_BARRIER))] "" "wdr" [(set_attr "length" "1")]) diff --git a/gcc/config/avr/constraints.md b/gcc/config/avr/constraints.md index 91d2aa3ff2b..81ed63db2cc 100644 --- a/gcc/config/avr/constraints.md +++ b/gcc/config/avr/constraints.md @@ -239,25 +239,25 @@ (define_constraint "Y00" (define_constraint "Y01" "Fixed-point or integer constant with bit representation 0x1" (ior (and (match_code "const_fixed") - (match_test "INTVAL (avr_to_int_mode (op)) == 1")) + (match_test "INTVAL (avr_to_int_mode (op)) == 1")) (match_test "satisfies_constraint_P (op)"))) (define_constraint "Ym1" "Fixed-point or integer constant with bit representation -0x1" (ior (and (match_code "const_fixed") - (match_test "INTVAL (avr_to_int_mode (op)) == -1")) + (match_test "INTVAL (avr_to_int_mode (op)) == -1")) (match_test "satisfies_constraint_N (op)"))) (define_constraint "Y02" "Fixed-point or integer constant with bit representation 0x2" (ior (and (match_code "const_fixed") - (match_test "INTVAL (avr_to_int_mode (op)) == 2")) + (match_test "INTVAL (avr_to_int_mode (op)) == 2")) (match_test "satisfies_constraint_K (op)"))) (define_constraint "Ym2" "Fixed-point or integer constant with bit representation -0x2" (ior (and (match_code "const_fixed") - (match_test "INTVAL (avr_to_int_mode (op)) == -2")) + (match_test "INTVAL (avr_to_int_mode (op)) == -2")) (match_test "satisfies_constraint_Cm2 (op)"))) ;; Constraint that's the empty set. Useful with mode and code iterators. diff --git a/gcc/config/avr/predicates.md b/gcc/config/avr/predicates.md index 97fe2220026..12013660ed1 100644 --- a/gcc/config/avr/predicates.md +++ b/gcc/config/avr/predicates.md @@ -50,10 +50,10 @@ (define_predicate "stack_register_operand" ;; Return true if OP is a valid address for lower half of I/O space. (define_special_predicate "low_io_address_operand" (ior (and (match_code "const_int") - (match_test "IN_RANGE (INTVAL (op) - avr_arch->sfr_offset, - 0, 0x1F)")) + (match_test "IN_RANGE (INTVAL (op) - avr_arch->sfr_offset, + 0, 0x1F)")) (and (match_code "symbol_ref") - (match_test "SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_IO_LOW")))) + (match_test "SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_IO_LOW")))) ;; Return true if OP is a register_operand or low_io_operand. (define_predicate "reg_or_low_io_operand" @@ -74,10 +74,10 @@ (define_predicate "high_io_address_operand" ;; Return true if OP is a valid address of I/O space. (define_special_predicate "io_address_operand" (ior (and (match_code "const_int") - (match_test "IN_RANGE (INTVAL (op) - avr_arch->sfr_offset, - 0, 0x3F)")) + (match_test "IN_RANGE (INTVAL (op) - avr_arch->sfr_offset, + 0, 0x3F)")) (and (match_code "symbol_ref") - (match_test "SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_IO")))) + (match_test "SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_IO")))) ;; Return 1 if OP is a general operand not in flash memory (define_predicate "nop_general_operand" @@ -185,8 +185,8 @@ (define_predicate "text_segment_operand" case SYMBOL_REF : return SYMBOL_REF_FUNCTION_P (op); case PLUS : - /* Assume canonical format of symbol + constant. - Fall through. */ + // Assume canonical format of symbol + constant. + // Fall through. case CONST : return text_segment_operand (XEXP (op, 0), VOIDmode); default :