From patchwork Fri Nov 14 19:19:38 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Segher Boessenkool X-Patchwork-Id: 410988 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 867C11400AB for ; Sat, 15 Nov 2014 06:21:20 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; q=dns; s=default; b=v2WsdNiD0OC5+Gw9OeS /QGfqmVizwasHdeILDSrnm9eHpfdYmD6JYpuHE0xLFYvVI+TZTY7F6qwZgrDqUzg GQ6zU5+GvTl4ixifVqm+ggJcL6DLEiXlKRWr1pnDR/QsPBiDqekKFJvrT+qqEouN i+VTl1IXpEedqe32881sblfk= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; s=default; bh=g5A7P2OtHlGfTEPngCVQnXMyX 5I=; b=QuunfY1/Z3u2vXyxylqBvwfSy5OnJkgQX0BH46JSkAzmz5Zkp91A/I5AI BhGG6pJzn5BHseclqJImEvxqfDdnhJCUURAYOLiTpKrdCTM9XAZpQqZB0IVff9X3 T22yuC5iWgrzKwdijwm6qsZiy1imQ5aWvDRrbXPK7B82MYkelk= Received: (qmail 2091 invoked by alias); 14 Nov 2014 19:21:09 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 2022 invoked by uid 89); 14 Nov 2014 19:21:08 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-2.0 required=5.0 tests=AWL, BAYES_00, T_RP_MATCHES_RCVD autolearn=ham version=3.3.2 X-HELO: gcc1-power7.osuosl.org Received: from gcc1-power7.osuosl.org (HELO gcc1-power7.osuosl.org) (140.211.15.137) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-GCM-SHA384 encrypted) ESMTPS; Fri, 14 Nov 2014 19:21:07 +0000 Received: from gcc1-power7.osuosl.org (localhost [127.0.0.1]) by gcc1-power7.osuosl.org (8.14.6/8.14.6) with ESMTP id sAEJL5NA017474; Fri, 14 Nov 2014 11:21:05 -0800 Received: (from segher@localhost) by gcc1-power7.osuosl.org (8.14.6/8.14.6/Submit) id sAEJL5hh017431; Fri, 14 Nov 2014 11:21:05 -0800 From: Segher Boessenkool To: gcc-patches@gcc.gnu.org Cc: Segher Boessenkool Subject: [PATCH 2/5] combine: handle I2 a parallel of two SETs Date: Fri, 14 Nov 2014 11:19:38 -0800 Message-Id: In-Reply-To: References: In-Reply-To: References: X-IsSubscribed: yes If I2 is a PARALLEL of two SETs, split it into two instructions, I1 and I2. If there already was an I1, rename it to I0. If there already was an I0, don't do anything. This surprisingly simple patch is enough to let combine handle such PARALLELs properly. 2014-11-14 Segher Boessenkool gcc/ * combine.c (try_combine): If I2 is a PARALLEL of two SETs, split it into two insns. --- gcc/combine.c | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/gcc/combine.c b/gcc/combine.c index f7797e7..c4d23e3 100644 --- a/gcc/combine.c +++ b/gcc/combine.c @@ -2780,6 +2780,37 @@ try_combine (rtx_insn *i3, rtx_insn *i2, rtx_insn *i1, rtx_insn *i0, SUBST_LINK (LOG_LINKS (i2), alloc_insn_link (i1, LOG_LINKS (i2))); } } + + /* If I2 is a PARALLEL of two SETs of REGs (and perhaps some CLOBBERs), + make those two SETs separate I1 and I2 insns, and make an I0 that is + the original I1. */ + if (i0 == 0 + && GET_CODE (PATTERN (i2)) == PARALLEL + && XVECLEN (PATTERN (i2), 0) >= 2 + && GET_CODE (XVECEXP (PATTERN (i2), 0, 0)) == SET + && GET_CODE (XVECEXP (PATTERN (i2), 0, 1)) == SET + && REG_P (SET_DEST (XVECEXP (PATTERN (i2), 0, 0))) + && REG_P (SET_DEST (XVECEXP (PATTERN (i2), 0, 1))) + && !reg_used_between_p (SET_DEST (XVECEXP (PATTERN (i2), 0, 0)), i2, i3) + && !reg_used_between_p (SET_DEST (XVECEXP (PATTERN (i2), 0, 1)), i2, i3) + && (XVECLEN (PATTERN (i2), 0) == 2 + || GET_CODE (XVECEXP (PATTERN (i2), 0, 2)) == CLOBBER)) + { + /* If there is no I1, there is no I0 either. */ + i0 = i1; + + /* We make I1 with the same INSN_UID as I2. This gives it + the same DF_INSN_LUID for value tracking. Our fake I1 will + never appear in the insn stream so giving it the same INSN_UID + as I2 will not cause a problem. */ + + i1 = gen_rtx_INSN (VOIDmode, NULL, i2, BLOCK_FOR_INSN (i2), + XVECEXP (PATTERN (i2), 0, 0), INSN_LOCATION (i2), + -1, NULL_RTX); + INSN_UID (i1) = INSN_UID (i2); + + SUBST (PATTERN (i2), XVECEXP (PATTERN (i2), 0, 1)); + } #endif /* Verify that I2 and I1 are valid for combining. */