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Wed, 23 Jan 2019 08:34:10 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.onmicrosoft.com; s=selector1-marvell-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=qOFy/UeRtNb4b/hH9jsP55uA0NUQfdf2TY0HhcsGqOI=; b=iE/4OHkfDg/YHUVvhmRIdW0WTzjIOYUeV8ne+86/oTMvPuABsLyyyclxv/GNKR0aIjS437K5Utne9gnf5o4558pr/waZSZi9HlpYVGKD+hHMXrb8NUmKQZ/sCFFAq7jnOBi6/hatEBlWRNg//eJJulCP/EZt9OW+dfLtVsI4HsM= Received: from BN6PR1801MB2033.namprd18.prod.outlook.com (10.161.156.162) by BN6PR1801MB1956.namprd18.prod.outlook.com (10.161.156.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1537.27; Wed, 23 Jan 2019 16:34:05 +0000 Received: from BN6PR1801MB2033.namprd18.prod.outlook.com ([fe80::927:7ff8:1493:3882]) by BN6PR1801MB2033.namprd18.prod.outlook.com ([fe80::927:7ff8:1493:3882%4]) with mapi id 15.20.1537.031; Wed, 23 Jan 2019 16:34:05 +0000 From: Steve Ellcey To: "gcc-patches@gcc.gnu.org" , "richard.sandiford@arm.com" Subject: [Patch] PR target/85711 - Fix ICE on aarch64 Date: Wed, 23 Jan 2019 16:34:05 +0000 Message-ID: received-spf: None (protection.outlook.com: marvell.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 MIME-Version: 1.0 X-Proofpoint-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1901230121 The test gcc.dg/torture/pr84682-2.c has been failing for some time on aarch64. Bin Cheng submitted a patch for this some time ago, the original patch was: https://gcc.gnu.org/ml/gcc-patches/2018-03/msg00784.html But Richard Sandiford thought it should be fixed in recog.c instead of just in aarch64.c. Bin submitted a followup: https://gcc.gnu.org/ml/gcc-patches/2018-03/msg01166.html But there were no replies to that patch submission. I have retested the second patch and verified it fixes the aarch64 failure and causes no regressions on aarch64 or x86. OK to checkin? Steve Ellcey sellcey@marvell.com 2019-01-23 Bin Cheng Steve Ellcey * recog.c (address_operand): Return false on wrong mode for address. * config/aarch64/aarch64.c (aarch64_classify_address): Remove assert since it's checked in general code now. diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 5df5a8b..aa3054d 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -6565,9 +6565,6 @@ aarch64_classify_address (struct aarch64_address_info *info, && (code != POST_INC && code != REG)) return false; - gcc_checking_assert (GET_MODE (x) == VOIDmode - || SCALAR_INT_MODE_P (GET_MODE (x))); - switch (code) { case REG: diff --git a/gcc/recog.c b/gcc/recog.c index d0c498f..fb90302 100644 --- a/gcc/recog.c +++ b/gcc/recog.c @@ -1070,6 +1070,11 @@ general_operand (rtx op, machine_mode mode) int address_operand (rtx op, machine_mode mode) { + /* Wrong mode for an address expr. */ + if (GET_MODE (op) != VOIDmode + && ! SCALAR_INT_MODE_P (GET_MODE (op))) + return false; + return memory_address_p (mode, op); }