From patchwork Fri Apr 12 11:38:02 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Hurugalawadi, Naveen" X-Patchwork-Id: 236055 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "localhost", Issuer "www.qmailtoaster.com" (not verified)) by ozlabs.org (Postfix) with ESMTPS id 690892C00B3 for ; Fri, 12 Apr 2013 21:38:24 +1000 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:message-id:content-type:mime-version; q=dns; s= default; b=kf7ksuz5LiaoifB7TdAaInV6TjFs33D0z/kFT0NhOfY7/vrXF9CTp hOBShwHxuZaRaQBY0GRrbWgH25r6uFgR2XGjPVn0k+QVmcmSQYwsem8g3G1A95aW +WTNpkShg0f0D4eHLeE/g/KWjhxayuRJPnqtHJT7VrbhH5ltqsSp4Q= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:message-id:content-type:mime-version; s= default; bh=T1Gz7eAec3/qGWOLlsnZDtkbhAo=; b=cA2xrS+n9/qeRyZyx4sh ruS+mR+/XaVdycjRmEqq+z5Q5g7WcF7RJcu4rhwqV3n8TgRBwCz35WIBXFblZhtx VHOweLJ8tNk1lo90ZolXdNlqn6zLpcJvv781ZXyxe/rU7YaOxq8RQFo7vc9UkN/s oc054DyR1Nsrau9ss5YbsWY= Received: (qmail 1693 invoked by alias); 12 Apr 2013 11:38:18 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 1682 invoked by uid 89); 12 Apr 2013 11:38:17 -0000 X-Spam-SWARE-Status: No, score=-3.7 required=5.0 tests=AWL, BAYES_00, KHOP_RCVD_UNTRUST, RCVD_IN_DNSWL_NONE, RCVD_IN_HOSTKARMA_W, RCVD_IN_HOSTKARMA_WL, TW_SX, TW_XT autolearn=no version=3.3.1 Received: from mail-db8lp0188.outbound.messaging.microsoft.com (HELO db8outboundpool.messaging.microsoft.com) (213.199.154.188) by sourceware.org (qpsmtpd/0.84/v0.84-167-ge50287c) with ESMTP; Fri, 12 Apr 2013 11:38:17 +0000 Received: from mail200-db8-R.bigfish.com (10.174.8.246) by DB8EHSOBE016.bigfish.com (10.174.4.79) with Microsoft SMTP Server id 14.1.225.23; Fri, 12 Apr 2013 11:38:13 +0000 Received: from mail200-db8 (localhost [127.0.0.1]) by mail200-db8-R.bigfish.com (Postfix) with ESMTP id DD91E9800D2 for ; Fri, 12 Apr 2013 11:38:13 +0000 (UTC) X-Forefront-Antispam-Report: CIP:157.56.240.133; KIP:(null); UIP:(null); IPV:NLI; H:BL2PRD0710HT001.namprd07.prod.outlook.com; RD:none; EFVD:NLI X-SpamScore: 0 X-BigFish: PS0(zz936eIc85fh4015Izz1f42h1fc6h1ee6h1de0h1fdah1202h1e76h1d1ah1d2ahzz8275bhz2dh2a8h668h839hd24hf0ah1288h12a5h12bdh137ah1441h1504h1537h153bh162dh1631h1758h18e1h1946h19b5h19ceh1ad9h1b0ah1bceh9a9j34h1155h) X-Forefront-Antispam-Report-Untrusted: SFV:SKI; SFS:; DIR:OUT; SFP:; SCL:-1; SRVR:SN2PR07MB029; H:SN2PR07MB029.namprd07.prod.outlook.com; LANG:en; Received: from mail200-db8 (localhost.localdomain [127.0.0.1]) by mail200-db8 (MessageSwitch) id 1365766692322011_29191; Fri, 12 Apr 2013 11:38:12 +0000 (UTC) Received: from DB8EHSMHS032.bigfish.com (unknown [10.174.8.235]) by mail200-db8.bigfish.com (Postfix) with ESMTP id 4C426DC004B for ; Fri, 12 Apr 2013 11:38:12 +0000 (UTC) Received: from BL2PRD0710HT001.namprd07.prod.outlook.com (157.56.240.133) by DB8EHSMHS032.bigfish.com (10.174.4.42) with Microsoft SMTP Server (TLS) id 14.1.225.23; Fri, 12 Apr 2013 11:38:11 +0000 Received: from SN2PR07MB029.namprd07.prod.outlook.com (10.255.174.39) by BL2PRD0710HT001.namprd07.prod.outlook.com (10.255.102.36) with Microsoft SMTP Server (TLS) id 14.16.293.5; Fri, 12 Apr 2013 11:38:04 +0000 Received: from SN2PR07MB029.namprd07.prod.outlook.com (10.255.174.39) by SN2PR07MB029.namprd07.prod.outlook.com (10.255.174.39) with Microsoft SMTP Server (TLS) id 15.0.670.13; Fri, 12 Apr 2013 11:38:03 +0000 Received: from SN2PR07MB029.namprd07.prod.outlook.com ([169.254.2.115]) by SN2PR07MB029.namprd07.prod.outlook.com ([169.254.2.115]) with mapi id 15.00.0670.000; Fri, 12 Apr 2013 11:38:03 +0000 From: "Hurugalawadi, Naveen" To: "gcc-patches@gcc.gnu.org" Subject: [PATCH, AArch64] Add/Sub and set flags instructions in extend and shift_extend mode Date: Fri, 12 Apr 2013 11:38:02 +0000 Message-ID: MIME-Version: 1.0 X-OriginatorOrg: caviumnetworks.com X-Virus-Found: No Hi, Please find attached the patch that implements addition and Subtraction by setting flags instructions in extend and shift_extend mode for aarch64 target. The patch for Add/Sub instructions by setting flags in shift mode is already posted. Testcase have been added for these instructions. Please review the same and let me know if there should be any modifications in the patch. Build and tested on aarch64-thunder-elf (using Cavium's internal simulator). No new regressions. Thanks, Naveen gcc/ 2013-04-12 Naveen H.S * config/aarch64/aarch64.md (*adds__multp2): New pattern. (*subs__multp2): New pattern. (*adds__): New pattern. (*subs__): New pattern. gcc/testsuite/ 2013-04-12 Naveen H.S * gcc.target/aarch64/adds3.c: New. * gcc.target/aarch64/subs3.c: New. --- gcc/config/aarch64/aarch64.md 2013-04-12 10:03:11.924990662 +0530 +++ gcc/config/aarch64/aarch64.md 2013-04-12 14:31:58.368958483 +0530 @@ -1291,6 +1291,78 @@ (set_attr "mode" "SI")] ) +(define_insn "*adds__" + [(set (reg:CC_NZ CC_REGNUM) + (compare:CC_NZ + (plus:GPI + (ANY_EXTEND:GPI (match_operand:ALLX 1 "register_operand" "r")) + (match_operand:GPI 2 "register_operand" "r")) + (const_int 0))) + (set (match_operand:GPI 0 "register_operand" "=r") + (plus:GPI (ANY_EXTEND:GPI (match_dup 1)) (match_dup 2)))] + "" + "adds\\t%0, %2, %1, xt" + [(set_attr "v8type" "alus_ext") + (set_attr "mode" "")] +) + +(define_insn "*subs__" + [(set (reg:CC_NZ CC_REGNUM) + (compare:CC_NZ + (minus:GPI (match_operand:GPI 1 "register_operand" "r") + (ANY_EXTEND:GPI + (match_operand:ALLX 2 "register_operand" "r"))) + (const_int 0))) + (set (match_operand:GPI 0 "register_operand" "=r") + (minus:GPI (match_dup 1) (ANY_EXTEND:GPI (match_dup 2))))] + "" + "subs\\t%0, %1, %2, xt" + [(set_attr "v8type" "alus_ext") + (set_attr "mode" "")] +) + +(define_insn "*adds__multp2" + [(set (reg:CC_NZ CC_REGNUM) + (compare:CC_NZ + (plus:GPI (ANY_EXTRACT:GPI + (mult:GPI (match_operand:GPI 1 "register_operand" "r") + (match_operand 2 "aarch64_pwr_imm3" "Up3")) + (match_operand 3 "const_int_operand" "n") + (const_int 0)) + (match_operand:GPI 4 "register_operand" "r")) + (const_int 0))) + (set (match_operand:GPI 0 "register_operand" "=r") + (plus:GPI (ANY_EXTRACT:GPI (mult:GPI (match_dup 1) (match_dup 2)) + (match_dup 3) + (const_int 0)) + (match_dup 4)))] + "aarch64_is_extend_from_extract (mode, operands[2], operands[3])" + "adds\\t%0, %4, %1, xt%e3 %p2" + [(set_attr "v8type" "alus_ext") + (set_attr "mode" "")] +) + +(define_insn "*subs__multp2" + [(set (reg:CC_NZ CC_REGNUM) + (compare:CC_NZ + (minus:GPI (match_operand:GPI 4 "register_operand" "r") + (ANY_EXTRACT:GPI + (mult:GPI (match_operand:GPI 1 "register_operand" "r") + (match_operand 2 "aarch64_pwr_imm3" "Up3")) + (match_operand 3 "const_int_operand" "n") + (const_int 0))) + (const_int 0))) + (set (match_operand:GPI 0 "register_operand" "=r") + (minus:GPI (match_dup 4) (ANY_EXTRACT:GPI + (mult:GPI (match_dup 1) (match_dup 2)) + (match_dup 3) + (const_int 0))))] + "aarch64_is_extend_from_extract (mode, operands[2], operands[3])" + "subs\\t%0, %4, %1, xt%e3 %p2" + [(set_attr "v8type" "alus_ext") + (set_attr "mode" "")] +) + (define_insn "*add3nr_compare0" [(set (reg:CC_NZ CC_REGNUM) (compare:CC_NZ --- gcc/testsuite/gcc.target/aarch64/adds3.c 1970-01-01 05:30:00.000000000 +0530 +++ gcc/testsuite/gcc.target/aarch64/adds3.c 2013-04-12 16:18:29.472945730 +0530 @@ -0,0 +1,61 @@ +/* { dg-do run } */ +/* { dg-options "-O2 --save-temps" } */ + +extern void abort (void); +typedef long long s64; + +int +adds_ext (s64 a, int b, int c) +{ + s64 d = a + b; + + /* { dg-final { scan-assembler "adds\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+, sxtw" } } */ + if (d == 0) + return a + c; + else + return b + d + c; +} + +int +adds_shift_ext (s64 a, int b, int c) +{ + s64 d = (a + ((s64)b << 3)); + + /* { dg-final { scan-assembler "adds\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+, sxtw 3" } } */ + if (d == 0) + return a + c; + else + return b + d + c; +} + +int main () +{ + int x; + s64 y; + + x = adds_ext (0x13000002ll, 41, 15); + if (x != 318767203) + abort (); + + x = adds_ext (0x50505050ll, 29, 4); + if (x != 1347440782) + abort (); + + x = adds_ext (0x12121212121ll, 2, 14); + if (x != 555819315) + abort (); + + x = adds_shift_ext (0x123456789ll, 4, 12); + if (x != 591751097) + abort (); + + x = adds_shift_ext (0x02020202ll, 9, 8); + if (x != 33686107) + abort (); + + x = adds_shift_ext (0x987987987987ll, 23, 41); + if (x != -2020050305) + abort (); + + return 0; +} --- gcc/testsuite/gcc.target/aarch64/subs3.c 1970-01-01 05:30:00.000000000 +0530 +++ gcc/testsuite/gcc.target/aarch64/subs3.c 2013-04-12 16:18:40.404945709 +0530 @@ -0,0 +1,61 @@ +/* { dg-do run } */ +/* { dg-options "-O2 --save-temps" } */ + +extern void abort (void); +typedef long long s64; + +int +subs_ext (s64 a, int b, int c) +{ + s64 d = a - b; + + /* { dg-final { scan-assembler "subs\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+, sxtw" } } */ + if (d == 0) + return a + c; + else + return b + d + c; +} + +int +subs_shift_ext (s64 a, int b, int c) +{ + s64 d = (a - ((s64)b << 3)); + + /* { dg-final { scan-assembler "subs\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+, sxtw 3" } } */ + if (d == 0) + return a + c; + else + return b + d + c; +} + +int main () +{ + int x; + s64 y; + + x = subs_ext (0x13000002ll, 41, 15); + if (x != 318767121) + abort (); + + x = subs_ext (0x50505050ll, 29, 4); + if (x != 1347440724) + abort (); + + x = subs_ext (0x12121212121ll, 2, 14); + if (x != 555819311) + abort (); + + x = subs_shift_ext (0x123456789ll, 4, 12); + if (x != 591751033) + abort (); + + x = subs_shift_ext (0x02020202ll, 9, 8); + if (x != 33685963) + abort (); + + x = subs_shift_ext (0x987987987987ll, 23, 41); + if (x != -2020050673) + abort (); + + return 0; +}