[arm/AArch64] Assume unhandled NEON types are neon_arith_basic types when scheduling for Cortex-A5

Hi all,

Some scheduling descriptions, like the Cortex-A57 one, are reused for 
multiple -mcpu options.
Sometimes those other -mcpu cores support more architecture features 
than the Armv8-A Cortex-A57.
For example, the Cortex-A75 and Cortex-A76 support Armv8.2-A as well as 
the Dot Product instructions.
These Dot Product instructions have the neon_dot and neon_dot_q 
scheduling type, but that type is not
handled in cortex-a57.md, since the Cortex-A57 itself doesn't need to 
care about these instructions.

But if we just ignore the neon_dot(_q) type at scheduling we get really 
terrible codegen when compiling
for -mcpu=cortex-a76, for example, because the scheduler just pools all 
the UDOT instructions at the end
of the basic block, since it doesn't assume anything about their behaviour.

This patch ameliorates the situation somewhat by telling the Cortex-A57 
scheduling model to treat any
insn that doesn't get assigned a cortex_a57_neon_type but is actually a 
is_neon_type instruction as
a simple neon_arith_basic instruction. This allows us to treat 
post-Armv8-A SIMD instructions more sanely
without having to model each of them explicitly in cortex-a57.md.

Bootstrapped and tested on arm-none-linux-gnueabihf and 
aarch64-none-linux-gnu.

Ok for trunk from an aarch64 perspective?

Thanks,
Kyrill

2019-01-07  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

     * config/arm/cortex-a57.md (cortex_a57_neon_type): Use neon_arith_basic
     for is_neon_type instructions that have not already been categorized.

Something somewhere cut off the subject line: it should say Cortex-A57.

Sorry about that.

Kyrill

On 7/1/19 4:13 PM, Kyrill Tkachov wrote:
> Hi all,
>
> Some scheduling descriptions, like the Cortex-A57 one, are reused for
> multiple -mcpu options.
> Sometimes those other -mcpu cores support more architecture features
> than the Armv8-A Cortex-A57.
> For example, the Cortex-A75 and Cortex-A76 support Armv8.2-A as well as
> the Dot Product instructions.
> These Dot Product instructions have the neon_dot and neon_dot_q
> scheduling type, but that type is not
> handled in cortex-a57.md, since the Cortex-A57 itself doesn't need to
> care about these instructions.
>
> But if we just ignore the neon_dot(_q) type at scheduling we get really
> terrible codegen when compiling
> for -mcpu=cortex-a76, for example, because the scheduler just pools all
> the UDOT instructions at the end
> of the basic block, since it doesn't assume anything about their 
> behaviour.
>
> This patch ameliorates the situation somewhat by telling the Cortex-A57
> scheduling model to treat any
> insn that doesn't get assigned a cortex_a57_neon_type but is actually a
> is_neon_type instruction as
> a simple neon_arith_basic instruction. This allows us to treat
> post-Armv8-A SIMD instructions more sanely
> without having to model each of them explicitly in cortex-a57.md.
>
> Bootstrapped and tested on arm-none-linux-gnueabihf and
> aarch64-none-linux-gnu.
>
> Ok for trunk from an aarch64 perspective?
>
> Thanks,
> Kyrill
>
> 2019-01-07  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
>
>      * config/arm/cortex-a57.md (cortex_a57_neon_type): Use 
> neon_arith_basic
>      for is_neon_type instructions that have not already been categorized.
>

On Mon, Jul 01, 2019 at 04:13:40PM +0100, Kyrill Tkachov wrote:
> Hi all,
> 
> Some scheduling descriptions, like the Cortex-A57 one, are reused for 
> multiple -mcpu options.
> Sometimes those other -mcpu cores support more architecture features 
> than the Armv8-A Cortex-A57.
> For example, the Cortex-A75 and Cortex-A76 support Armv8.2-A as well as 
> the Dot Product instructions.
> These Dot Product instructions have the neon_dot and neon_dot_q 
> scheduling type, but that type is not
> handled in cortex-a57.md, since the Cortex-A57 itself doesn't need to 
> care about these instructions.
> 
> But if we just ignore the neon_dot(_q) type at scheduling we get really 
> terrible codegen when compiling
> for -mcpu=cortex-a76, for example, because the scheduler just pools all 
> the UDOT instructions at the end
> of the basic block, since it doesn't assume anything about their behaviour.
> 
> This patch ameliorates the situation somewhat by telling the Cortex-A57 
> scheduling model to treat any
> insn that doesn't get assigned a cortex_a57_neon_type but is actually a 
> is_neon_type instruction as
> a simple neon_arith_basic instruction. This allows us to treat 
> post-Armv8-A SIMD instructions more sanely
> without having to model each of them explicitly in cortex-a57.md.
> 
> Bootstrapped and tested on arm-none-linux-gnueabihf and 
> aarch64-none-linux-gnu.
> 
> Ok for trunk from an aarch64 perspective?

OK.

Thansk,
James

> 
> Thanks,
> Kyrill
>