diff mbox series

[2/4] rs6000: Tests for setbc

Message ID c801c6e9578c9507cdd89b64019e61d9e1921865.1588796541.git.wschmidt@linux.ibm.com
State New
Headers show
Series rs6000: setbnc and friends [pu] | expand

Commit Message

Bill Schmidt May 6, 2020, 8:31 p.m. UTC 
2020-05-06  Segher Boessenkool  <segher@kernel.crashing.org>

	* gcc.target/powerpc/setbc.h: New.
	* gcc.target/powerpc/setbceq.c: New.
	* gcc.target/powerpc/setbcge.c: New.
	* gcc.target/powerpc/setbcgt.c: New.
	* gcc.target/powerpc/setbcle.c: New.
	* gcc.target/powerpc/setbclt.c: New.
	* gcc.target/powerpc/setbcne.c: New.
---
 gcc/testsuite/gcc.target/powerpc/setbc.h   | 27 ++++++++++++++++++++++
 gcc/testsuite/gcc.target/powerpc/setbceq.c |  9 ++++++++
 gcc/testsuite/gcc.target/powerpc/setbcge.c | 12 ++++++++++
 gcc/testsuite/gcc.target/powerpc/setbcgt.c | 10 ++++++++
 gcc/testsuite/gcc.target/powerpc/setbcle.c | 10 ++++++++
 gcc/testsuite/gcc.target/powerpc/setbclt.c | 12 ++++++++++
 gcc/testsuite/gcc.target/powerpc/setbcne.c |  9 ++++++++
 7 files changed, 89 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/powerpc/setbc.h
 create mode 100644 gcc/testsuite/gcc.target/powerpc/setbceq.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/setbcge.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/setbcgt.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/setbcle.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/setbclt.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/setbcne.c
diff mbox series

Patch

diff --git a/gcc/testsuite/gcc.target/powerpc/setbc.h b/gcc/testsuite/gcc.target/powerpc/setbc.h
new file mode 100644
index 00000000000..51334246eca
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/setbc.h
@@ -0,0 +1,27 @@ 
+#define XSTR(a,b) a ## b
+#define T(a,b) XSTR(a,b)
+
+int  T(NAME,ii)(int a, int b)   { return a CODE b; }
+int  T(NAME,il)(long a, long b) { return a CODE b; }
+long T(NAME,li)(int a, int b)   { return a CODE b; }
+long T(NAME,ll)(long a, long b) { return a CODE b; }
+
+int  T(NAME,iin0)(int a)  { return a CODE 0; }
+int  T(NAME,iln0)(long a) { return a CODE 0; }
+long T(NAME,lin0)(int a)  { return a CODE 0; }
+long T(NAME,lln0)(long a) { return a CODE 0; }
+
+int  T(NAME,iin1)(int a)  { return a CODE 1; }
+int  T(NAME,iln1)(long a) { return a CODE 1; }
+long T(NAME,lin1)(int a)  { return a CODE 1; }
+long T(NAME,lln1)(long a) { return a CODE 1; }
+
+int  T(NAME,iinm1)(int a)  { return a CODE -1; }
+int  T(NAME,ilnm1)(long a) { return a CODE -1; }
+long T(NAME,linm1)(int a)  { return a CODE -1; }
+long T(NAME,llnm1)(long a) { return a CODE -1; }
+
+int  T(NAME,iin42)(int a)  { return a CODE 42; }
+int  T(NAME,iln42)(long a) { return a CODE 42; }
+long T(NAME,lin42)(int a)  { return a CODE 42; }
+long T(NAME,lln42)(long a) { return a CODE 42; }
diff --git a/gcc/testsuite/gcc.target/powerpc/setbceq.c b/gcc/testsuite/gcc.target/powerpc/setbceq.c
new file mode 100644
index 00000000000..ee3cbffa6f5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/setbceq.c
@@ -0,0 +1,9 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcpu=future" } */
+
+#define NAME eq
+#define CODE ==
+
+#include "setbc.h"
+
+/* { dg-final { scan-assembler-times {\msetbc\M} 20 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/setbcge.c b/gcc/testsuite/gcc.target/powerpc/setbcge.c
new file mode 100644
index 00000000000..06d58159768
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/setbcge.c
@@ -0,0 +1,12 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcpu=future" } */
+
+#define NAME ge
+#define CODE >=
+
+#include "setbc.h"
+
+/* "x >= 0" is done without setbc.
+   The generic code sometimes transforms "x >= A" to "x > A-1"; we allow
+   either here.  */
+/* { dg-final { scan-assembler-times {\msetbcr?\M} 16 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/setbcgt.c b/gcc/testsuite/gcc.target/powerpc/setbcgt.c
new file mode 100644
index 00000000000..864ae3a7e44
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/setbcgt.c
@@ -0,0 +1,10 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcpu=future" } */
+
+#define NAME gt
+#define CODE >
+
+#include "setbc.h"
+
+/* "x > -1" is done without setbc.  */
+/* { dg-final { scan-assembler-times {\msetbc\M} 16 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/setbcle.c b/gcc/testsuite/gcc.target/powerpc/setbcle.c
new file mode 100644
index 00000000000..05df4075b1c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/setbcle.c
@@ -0,0 +1,10 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcpu=future" } */
+
+#define NAME le
+#define CODE <=
+
+#include "setbc.h"
+
+/* "x <= -1" is done without setbc.  */
+/* { dg-final { scan-assembler-times {\msetbcr\M} 16 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/setbclt.c b/gcc/testsuite/gcc.target/powerpc/setbclt.c
new file mode 100644
index 00000000000..52ffb1fd7e1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/setbclt.c
@@ -0,0 +1,12 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcpu=future" } */
+
+#define NAME lt
+#define CODE <
+
+#include "setbc.h"
+
+/* "x < 0" is done without setbc.
+   The generic code sometimes transforms "x < A" to "x <= A-1"; we allow
+   either here.  */
+/* { dg-final { scan-assembler-times {\msetbcr?\M} 16 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/setbcne.c b/gcc/testsuite/gcc.target/powerpc/setbcne.c
new file mode 100644
index 00000000000..841448ab5e5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/setbcne.c
@@ -0,0 +1,9 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcpu=future" } */
+
+#define NAME ne
+#define CODE !=
+
+#include "setbc.h"
+
+/* { dg-final { scan-assembler-times {\msetbcr\M} 20 } } */