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Thu, 29 Jul 2021 13:32:34 +0000 Received: from b01ledav005.gho.pok.ibm.com (b01ledav005.gho.pok.ibm.com [9.57.199.110]) by b01cxnp23032.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 16TDWXUk54198568 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 29 Jul 2021 13:32:33 GMT Received: from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A5ED9AE060; Thu, 29 Jul 2021 13:32:33 +0000 (GMT) Received: from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 8A450AE06D; Thu, 29 Jul 2021 13:32:33 +0000 (GMT) Received: from localhost (unknown [9.40.194.84]) by b01ledav005.gho.pok.ibm.com (Postfix) with ESMTP; Thu, 29 Jul 2021 13:32:33 +0000 (GMT) To: gcc-patches@gcc.gnu.org Subject: [PATCH 12/34] rs6000: Add miscellaneous builtins Date: Thu, 29 Jul 2021 08:30:59 -0500 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: UdZAvDIRROK4-d0JWimkIhblO0O_32D1 X-Proofpoint-GUID: aSeSdoWVmjrVFMTic2G5Ttk5Dr4WVjIa X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-07-29_10:2021-07-29, 2021-07-29 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 mlxscore=0 adultscore=0 mlxlogscore=999 lowpriorityscore=0 clxscore=1015 bulkscore=0 priorityscore=1501 impostorscore=0 phishscore=0 suspectscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2107140000 definitions=main-2107290084 X-Spam-Status: No, score=-11.6 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Bill Schmidt via Gcc-patches From: Bill Schmidt Reply-To: Bill Schmidt Cc: dje.gcc@gmail.com, segher@kernel.crashing.org, willschm@linux.ibm.com Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" 2021-06-15 Bill Schmidt gcc/ * config/rs6000/rs6000-builtin-new.def: Add ieee128-hw, dfp, crypto, and htm stanzas. --- gcc/config/rs6000/rs6000-builtin-new.def | 215 +++++++++++++++++++++++ 1 file changed, 215 insertions(+) diff --git a/gcc/config/rs6000/rs6000-builtin-new.def b/gcc/config/rs6000/rs6000-builtin-new.def index 4b65d54d913..805bdc87acd 100644 --- a/gcc/config/rs6000/rs6000-builtin-new.def +++ b/gcc/config/rs6000/rs6000-builtin-new.def @@ -2811,6 +2811,221 @@ XL_LEN_R xl_len_r {} +; Builtins requiring hardware support for IEEE-128 floating-point. +[ieee128-hw] + fpmath _Float128 __builtin_addf128_round_to_odd (_Float128, _Float128); + ADDF128_ODD addkf3_odd {} + + fpmath _Float128 __builtin_divf128_round_to_odd (_Float128, _Float128); + DIVF128_ODD divkf3_odd {} + + fpmath _Float128 __builtin_fmaf128_round_to_odd (_Float128, _Float128, _Float128); + FMAF128_ODD fmakf4_odd {} + + fpmath _Float128 __builtin_mulf128_round_to_odd (_Float128, _Float128); + MULF128_ODD mulkf3_odd {} + + const signed int __builtin_vsx_scalar_cmp_exp_qp_eq (_Float128, _Float128); + VSCEQPEQ xscmpexpqp_eq_kf {} + + const signed int __builtin_vsx_scalar_cmp_exp_qp_gt (_Float128, _Float128); + VSCEQPGT xscmpexpqp_gt_kf {} + + const signed int __builtin_vsx_scalar_cmp_exp_qp_lt (_Float128, _Float128); + VSCEQPLT xscmpexpqp_lt_kf {} + + const signed int __builtin_vsx_scalar_cmp_exp_qp_unordered (_Float128, _Float128); + VSCEQPUO xscmpexpqp_unordered_kf {} + + fpmath _Float128 __builtin_sqrtf128_round_to_odd (_Float128); + SQRTF128_ODD sqrtkf2_odd {} + + fpmath _Float128 __builtin_subf128_round_to_odd (_Float128, _Float128); + SUBF128_ODD subkf3_odd {} + + fpmath double __builtin_truncf128_round_to_odd (_Float128); + TRUNCF128_ODD trunckfdf2_odd {} + + const signed long long __builtin_vsx_scalar_extract_expq (_Float128); + VSEEQP xsxexpqp_kf {} + + const signed __int128 __builtin_vsx_scalar_extract_sigq (_Float128); + VSESQP xsxsigqp_kf {} + + const _Float128 __builtin_vsx_scalar_insert_exp_q (unsigned __int128, unsigned long long); + VSIEQP xsiexpqp_kf {} + + const _Float128 __builtin_vsx_scalar_insert_exp_qp (_Float128, unsigned long long); + VSIEQPF xsiexpqpf_kf {} + + const signed int __builtin_vsx_scalar_test_data_class_qp (_Float128, const int<7>); + VSTDCQP xststdcqp_kf {} + + const signed int __builtin_vsx_scalar_test_neg_qp (_Float128); + VSTDCNQP xststdcnegqp_kf {} + + + +; Decimal floating-point builtins. +[dfp] + const _Decimal64 __builtin_ddedpd (const int<2>, _Decimal64); + DDEDPD dfp_ddedpd_dd {} + + const _Decimal128 __builtin_ddedpdq (const int<2>, _Decimal128); + DDEDPDQ dfp_ddedpd_td {} + + const _Decimal64 __builtin_denbcd (const int<1>, _Decimal64); + DENBCD dfp_denbcd_dd {} + + const _Decimal128 __builtin_denbcdq (const int<1>, _Decimal128); + DENBCDQ dfp_denbcd_td {} + + const _Decimal128 __builtin_denb2dfp_v16qi (vsc); + DENB2DFP_V16QI dfp_denbcd_v16qi {} + + const _Decimal64 __builtin_diex (signed long long, _Decimal64); + DIEX dfp_diex_dd {} + + const _Decimal128 __builtin_diexq (signed long long, _Decimal128); + DIEXQ dfp_diex_td {} + + const _Decimal64 __builtin_dscli (_Decimal64, const int<6>); + DSCLI dfp_dscli_dd {} + + const _Decimal128 __builtin_dscliq (_Decimal128, const int<6>); + DSCLIQ dfp_dscli_td {} + + const _Decimal64 __builtin_dscri (_Decimal64, const int<6>); + DSCRI dfp_dscri_dd {} + + const _Decimal128 __builtin_dscriq (_Decimal128, const int<6>); + DSCRIQ dfp_dscri_td {} + + const signed long long __builtin_dxex (_Decimal64); + DXEX dfp_dxex_dd {} + + const signed long long __builtin_dxexq (_Decimal128); + DXEXQ dfp_dxex_td {} + + const _Decimal128 __builtin_pack_dec128 (unsigned long long, unsigned long long); + PACK_TD packtd {} + + void __builtin_set_fpscr_drn (const int[0,7]); + SET_FPSCR_DRN rs6000_set_fpscr_drn {} + + const unsigned long __builtin_unpack_dec128 (_Decimal128, const int<1>); + UNPACK_TD unpacktd {} + + +[crypto] + const vull __builtin_crypto_vcipher (vull, vull); + VCIPHER crypto_vcipher_v2di {} + + const vuc __builtin_crypto_vcipher_be (vuc, vuc); + VCIPHER_BE crypto_vcipher_v16qi {} + + const vull __builtin_crypto_vcipherlast (vull, vull); + VCIPHERLAST crypto_vcipherlast_v2di {} + + const vuc __builtin_crypto_vcipherlast_be (vuc, vuc); + VCIPHERLAST_BE crypto_vcipherlast_v16qi {} + + const vull __builtin_crypto_vncipher (vull, vull); + VNCIPHER crypto_vncipher_v2di {} + + const vuc __builtin_crypto_vncipher_be (vuc, vuc); + VNCIPHER_BE crypto_vncipher_v16qi {} + + const vull __builtin_crypto_vncipherlast (vull, vull); + VNCIPHERLAST crypto_vncipherlast_v2di {} + + const vuc __builtin_crypto_vncipherlast_be (vuc, vuc); + VNCIPHERLAST_BE crypto_vncipherlast_v16qi {} + + const vull __builtin_crypto_vsbox (vull); + VSBOX crypto_vsbox_v2di {} + + const vuc __builtin_crypto_vsbox_be (vuc); + VSBOX_BE crypto_vsbox_v16qi {} + + const vull __builtin_crypto_vshasigmad (vull, const int<1>, const int<4>); + VSHASIGMAD crypto_vshasigmad {} + + const vui __builtin_crypto_vshasigmaw (vui, const int<1>, const int<4>); + VSHASIGMAW crypto_vshasigmaw {} + + +[htm] + unsigned long long __builtin_get_texasr (); + GET_TEXASR nothing {htm,htmspr} + + unsigned long long __builtin_get_texasru (); + GET_TEXASRU nothing {htm,htmspr} + + unsigned long long __builtin_get_tfhar (); + GET_TFHAR nothing {htm,htmspr} + + unsigned long long __builtin_get_tfiar (); + GET_TFIAR nothing {htm,htmspr} + + void __builtin_set_texasr (unsigned long long); + SET_TEXASR nothing {htm,htmspr} + + void __builtin_set_texasru (unsigned long long); + SET_TEXASRU nothing {htm,htmspr} + + void __builtin_set_tfhar (unsigned long long); + SET_TFHAR nothing {htm,htmspr} + + void __builtin_set_tfiar (unsigned long long); + SET_TFIAR nothing {htm,htmspr} + + unsigned int __builtin_tabort (unsigned int); + TABORT tabort {htm,htmcr} + + unsigned int __builtin_tabortdc (unsigned long long, unsigned long long, unsigned long long); + TABORTDC tabortdc {htm,htmcr} + + unsigned int __builtin_tabortdci (unsigned long long, unsigned long long, unsigned long long); + TABORTDCI tabortdci {htm,htmcr} + + unsigned int __builtin_tabortwc (unsigned int, unsigned int, unsigned int); + TABORTWC tabortwc {htm,htmcr} + + unsigned int __builtin_tabortwci (unsigned int, unsigned int, unsigned int); + TABORTWCI tabortwci {htm,htmcr} + + unsigned int __builtin_tbegin (unsigned int); + TBEGIN tbegin {htm,htmcr} + + unsigned int __builtin_tcheck (); + TCHECK tcheck {htm,htmcr} + + unsigned int __builtin_tend (unsigned int); + TEND tend {htm,htmcr} + + unsigned int __builtin_tendall (); + TENDALL tend {htm,htmcr} + + unsigned int __builtin_trechkpt (); + TRECHKPT trechkpt {htm,htmcr} + + unsigned int __builtin_treclaim (unsigned int); + TRECLAIM treclaim {htm,htmcr} + + unsigned int __builtin_tresume (); + TRESUME tsr {htm,htmcr} + + unsigned int __builtin_tsr (unsigned int); + TSR tsr {htm,htmcr} + + unsigned int __builtin_tsuspend (); + TSUSPEND tsr {htm,htmcr} + + unsigned int __builtin_ttest (); + TTEST ttest {htm,htmcr} + + [power10] const vbq __builtin_altivec_cmpge_1ti (vsq, vsq); CMPGE_1TI vector_nltv1ti {}