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RCS file: /cvs/gcc/wwwdocs/htdocs/simtest-howto.html,v
retrieving revision 1.32
@@ -171,12 +171,12 @@
significantly different code to be generated and can matter more
than word size and endianness in terms of detecting new breakage.</p>
-<table border="0" cellspacing="5" cellpadding="5">
-<tr valign="top" align="left">
+<table cellspacing="5" cellpadding="5">
+<tr align="left">
<th>Target</th><th>Simulator</th><th>Comments</th><th>Test Results</th>
</tr>
-<tr valign="top">
+<tr>
<td>arm-elf</td>
<td>arm-sim</td>
<td>32-bit word, little endian</td>
@@ -187,7 +187,7 @@
</td>
</tr>
-<tr valign="top">
+<tr>
<td>fr30-elf</td>
<td>fr30-sim</td>
<td>32-bit word, big endian</td>
@@ -196,7 +196,7 @@
</td>
</tr>
-<tr valign="top">
+<tr>
<td>h8300-coff</td>
<td>h8300-sim</td>
<td>cc0 target, big endian</td>
@@ -207,7 +207,7 @@
</td>
</tr>
-<tr valign="top">
+<tr>
<td>m32r-elf</td>
<td>m32r-sim</td>
<td>32-bit word, big endian</td>
@@ -216,7 +216,7 @@
</td>
</tr>
-<tr valign="top">
+<tr>
<td>mips-elf</td>
<td>mips-sim</td>
<td>big endian</td>
@@ -227,7 +227,7 @@
</td>
</tr>
-<tr valign="top">
+<tr>
<td>mipsisa64-elf</td>
<td>mips-sim-idt64</td>
<td> </td>
@@ -236,7 +236,7 @@
</td>
</tr>
-<tr valign="top">
+<tr>
<td>mn10300-elf</td>
<td>mn10300-sim</td>
<td>cc0 target, little endian</td>
@@ -247,7 +247,7 @@
</td>
</tr>
-<tr valign="top">
+<tr>
<td>powerpc-eabisim</td>
<td>powerpc-sim</td>
<td>32-bit word, big endian</td>
@@ -256,7 +256,7 @@
</td>
</tr>
-<tr valign="top">
+<tr>
<td>sh-coff</td>
<td>sh-hms</td>
<td> </td>
@@ -267,7 +267,7 @@
</td>
</tr>
-<tr valign="top">
+<tr>
<td>sh-elf</td>
<td>sh-sim</td>
<td>big endian</td>
@@ -282,7 +282,7 @@
</td>
</tr>
-<tr valign="top">
+<tr>
<td>sparc-elf</td>
<td>sparc-sim</td>
<td> </td>
@@ -293,7 +293,7 @@
</td>
</tr>
-<tr valign="top">
+<tr>
<td>v850-elf</td>
<td>v850-sim</td>
<td>cc0 target, 32-bit word, little endian</td>