From patchwork Sun Mar 12 00:31:50 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gerald Pfeifer X-Patchwork-Id: 737770 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3vghmB114Yz9s7g for ; Sun, 12 Mar 2017 11:32:40 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="NSjbbBPi"; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:in-reply-to:message-id:references :mime-version:content-type; q=dns; s=default; b=bdjEw+k+rYjUJREx U67e3UjEUwH5xMTbDMFQ0arribA5ArhYDYYK0X0gU/j/6S/yQKMVT5XW91FXfDKE qklCLsENDGlnEZUQ8KFl70zXwqE4NjDevyF1NDtjeA417slZ3Dv0mRCmeSWprUgJ LBVwx4BThYRQmhoF9uPYlGWzamE= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:in-reply-to:message-id:references :mime-version:content-type; s=default; bh=wmglESs6iQGGIGvKNRWRx7 7hFqM=; b=NSjbbBPiNu037jZ2MifKp9cy+AMZJL5t2E0l7dyng0bRICyIUg8Oms WcGfKRwdjWnoRq+ttiiddlRb3nr8vJeYAvUQPR/qEi3rQd5u/3q04xQJZN/q9/2Z 8shlJxyLe1KKdZbalVGUSPsWbPwS3dLPG/EhQdcPBQUiZ7xXHbmRI= Received: (qmail 1066 invoked by alias); 12 Mar 2017 00:32:13 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 1055 invoked by uid 89); 12 Mar 2017 00:32:12 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-11.1 required=5.0 tests=BAYES_00, GIT_PATCH_2, GIT_PATCH_3, KAM_ASCII_DIVIDERS, RCVD_IN_DNSWL_NONE, SPF_PASS autolearn=ham version=3.3.2 spammy=brings, chase X-HELO: ainaz.pair.com Received: from ainaz.pair.com (HELO ainaz.pair.com) (209.68.2.66) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Sun, 12 Mar 2017 00:32:10 +0000 Received: from anthias (vie-188-118-249-200.dsl.sil.at [188.118.249.200]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ainaz.pair.com (Postfix) with ESMTPSA id 6A9DC3F531; Sat, 11 Mar 2017 19:32:08 -0500 (EST) Date: Sun, 12 Mar 2017 01:31:50 +0100 (CET) From: Gerald Pfeifer To: Jakub Jelinek cc: gcc-patches@gcc.gnu.org, Kirill Yukhin , Uros Bizjak , "H.J. Lu" Subject: Re: [wwwdocs] Fix four references to Intel instruction set references In-Reply-To: <20170207222646.GY1849@tucnak> Message-ID: References: <20170206180622.GI1849@tucnak> <20170207222646.GY1849@tucnak> MIME-Version: 1.0 X-IsSubscribed: yes On Tue, 7 Feb 2017, Jakub Jelinek wrote: >> Hmm, this is not good since 319433-020.pdf and 319433-022.pdf redirect >> to 319433-028 (which is the same as under the new URL I now used). And >> the links to 319433-015.pdf and 319433-023.pdf both were broken. >> >> Do you have a recommendation? > I think > https://software.intel.com/sites/default/files/managed/39/c5/325462-sdm-vol-1-2abcd-3abcd.pdf > The -028 manual only contains AVX512{VBMI,IFMA,4FMAPS,4VNNIW,VPOPCNT*} instructions > plus for some very strange reason VPERMT2* instruction which is declared > to be part of AVX512{F,VL,BW}. Thanks, Jakub! I went ahead with this recommendation and on the way also boiled down the number of links from four to two (since it's pretty likely we'll have to chase this again a year or two from now). Applied. Gerald Index: svn.html =================================================================== RCS file: /cvs/gcc/wwwdocs/htdocs/svn.html,v retrieving revision 1.216 diff -u -r1.216 svn.html --- svn.html 28 Feb 2017 02:47:07 -0000 1.216 +++ svn.html 12 Mar 2017 00:00:26 -0000 @@ -406,7 +406,7 @@
avx-512vlbwdq
The goal of this branch is to implement the Intel AVX-512{VL,BW,DQ} Programming Reference - (link). + (link). The branch is maintained by Yukhin Kirill <kirill.yukhin@intel.com>. Patches should be marked with the tag [AVX512] in the subject @@ -464,8 +464,7 @@ and H.J. Lu <hjl.tools@gmail.com>.
mpx
-
The goal of this branch is to support Intel MPX technology - (link). +
The goal of this branch is to support Intel MPX technology. The branch is maintained by Ilya Enkovich <ilya.enkovich@intel.com> Patches should be marked with the tag [MPX] in the subject Index: gcc-5/changes.html =================================================================== RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-5/changes.html,v retrieving revision 1.146 diff -u -r1.146 changes.html --- gcc-5/changes.html 11 Mar 2017 23:17:24 -0000 1.146 +++ gcc-5/changes.html 12 Mar 2017 00:00:26 -0000 @@ -776,9 +776,9 @@

IA-32/x86-64

    -
  • New ISA extensions support - - AVX-512{BW,DQ,VL,IFMA,VBMI} of Intel's CPU +
  • New ISA extensions + support AVX-512{BW,DQ,VL,IFMA,VBMI} of Intel's CPU codenamed Skylake Server was added to GCC. That includes inline assembly support, new intrinsics, and basic autovectorization. These new AVX-512 extensions are available via @@ -788,9 +788,8 @@ -mavx512dq, AVX-512 FMA-52 instructions: -mavx512ifma and for AVX-512 Vector Bit Manipulation Instructions: -mavx512vbmi.
    • -
  • New ISA extensions support - - Intel MPX was added to GCC. This new extension is available via the +
  • New ISA extensions support Intel MPX was added to GCC. + This new extension is available via the -mmpx compiler switch. Intel MPX is a set of processor features which, with compiler, run-time library and OS support, brings increased robustness to software by run-time checking pointer references against their bounds.