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[wwwdocs] Fix four references to Intel instruction set references

Message ID alpine.LSU.2.20.1701282306100.2449@anthias.pfeifer.com
State New
Headers show

Commit Message

Gerald Pfeifer Feb. 6, 2017, 5:44 p.m. UTC
Intel's webmasters were at it again (or rather not).

One old link in svn.html contained "319433-020" in its file name, the 
new one I found shows "319433-028" on the title page, so I assume this
is a newer version of the same?

Similar for the olther old link in svn.html which has "319433-015.pdf".

And similarly so for the two different(!) links on gcc-5/changes.html.

Hopefully by consolidating to use the same URL for four references
this will become easier in the future.

Applied.

Gerald

Comments

Jakub Jelinek Feb. 6, 2017, 6:06 p.m. UTC | #1
On Mon, Feb 06, 2017 at 06:44:30PM +0100, Gerald Pfeifer wrote:
> Intel's webmasters were at it again (or rather not).
> 
> One old link in svn.html contained "319433-020" in its file name, the 
> new one I found shows "319433-028" on the title page, so I assume this
> is a newer version of the same?

Unfortunately not.  In -025 they've removed most of the instructions
from the manual (moved to another manual), so e.g. -028 is useless for
anything except the very latest ISAs.  So when talking about VL,BW,DQ
at least, all those are in the base manuals now.

	Jakub
Gerald Pfeifer Feb. 7, 2017, 10:02 p.m. UTC | #2
On Mon, 6 Feb 2017, Jakub Jelinek wrote:
>> One old link in svn.html contained "319433-020" in its file name, the 
>> new one I found shows "319433-028" on the title page, so I assume this
>> is a newer version of the same?
> Unfortunately not.  In -025 they've removed most of the instructions
> from the manual (moved to another manual), so e.g. -028 is useless for
> anything except the very latest ISAs.  So when talking about VL,BW,DQ
> at least, all those are in the base manuals now.

Hmm, this is not good since 319433-020.pdf and 319433-022.pdf redirect
to 319433-028 (which is the same as under the new URL I now used).  And
the links to 319433-015.pdf and 319433-023.pdf both were broken.

Do you have a recommendation?

Gerald
Jakub Jelinek Feb. 7, 2017, 10:26 p.m. UTC | #3
On Tue, Feb 07, 2017 at 11:02:38PM +0100, Gerald Pfeifer wrote:
> On Mon, 6 Feb 2017, Jakub Jelinek wrote:
> >> One old link in svn.html contained "319433-020" in its file name, the 
> >> new one I found shows "319433-028" on the title page, so I assume this
> >> is a newer version of the same?
> > Unfortunately not.  In -025 they've removed most of the instructions
> > from the manual (moved to another manual), so e.g. -028 is useless for
> > anything except the very latest ISAs.  So when talking about VL,BW,DQ
> > at least, all those are in the base manuals now.
> 
> Hmm, this is not good since 319433-020.pdf and 319433-022.pdf redirect
> to 319433-028 (which is the same as under the new URL I now used).  And
> the links to 319433-015.pdf and 319433-023.pdf both were broken.
> 
> Do you have a recommendation?

I think 
https://software.intel.com/sites/default/files/managed/39/c5/325462-sdm-vol-1-2abcd-3abcd.pdf
The -028 manual only contains AVX512{VBMI,IFMA,4FMAPS,4VNNIW,VPOPCNT*} instructions
plus for some very strange reason VPERMT2* instruction which is declared
to be part of AVX512{F,VL,BW}.

	Jakub
diff mbox

Patch

Index: svn.html
===================================================================
RCS file: /cvs/gcc/wwwdocs/htdocs/svn.html,v
retrieving revision 1.208
diff -u -r1.208 svn.html
--- svn.html	6 Aug 2016 15:37:39 -0000	1.208
+++ svn.html	6 Feb 2017 15:20:18 -0000
@@ -374,7 +374,7 @@ 
   <dt>avx-512vlbwdq</dt>
   <dd>The goal of this branch is to implement the Intel AVX-512{VL,BW,DQ}
   Programming Reference
-  (<a href="https://software.intel.com/sites/default/files/managed/c6/a9/319433-020.pdf">link</a>).
+  (<a href="https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf">link</a>).
   The branch is maintained by Yukhin Kirill &lt;<a
   href="mailto:kirill.yukhin@intel.com">kirill.yukhin@intel.com</a>&gt;.
   Patches should be marked with the tag <code>[AVX512]</code> in the subject
@@ -390,7 +390,7 @@ 
 
   <dt>mpx</dt>
   <dd>The goal of this branch is to support Intel MPX technology
-  (<a href="http://download-software.intel.com/sites/default/files/319433-015.pdf">link</a>).
+  (<a href="https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf">link</a>).
   The branch is maintained by
   Ilya Enkovich &lt;<a href="mailto:ilya.enkovich@intel.com">ilya.enkovich@intel.com</a>&gt;
   Patches should be marked with the tag <code>[MPX]</code> in the subject
Index: gcc-5/changes.html
===================================================================
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-5/changes.html,v
retrieving revision 1.142
diff -u -r1.142 changes.html
--- gcc-5/changes.html	5 Feb 2017 21:47:16 -0000	1.142
+++ gcc-5/changes.html	6 Feb 2017 15:20:19 -0000
@@ -776,7 +776,7 @@ 
 <h3 id="x86">IA-32/x86-64</h3>
   <ul>
     <li>New ISA extensions support
-	<a href="https://software.intel.com/sites/default/files/managed/0d/53/319433-023.pdf">
+	<a href="https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf">
 	AVX-512{BW,DQ,VL,IFMA,VBMI}</a> of Intel's CPU
 	codenamed Skylake Server was added to GCC.  That includes inline
 	assembly support, new intrinsics, and basic autovectorization.  These
@@ -788,7 +788,7 @@ 
 	<code>-mavx512ifma</code> and for AVX-512 Vector Bit Manipulation
 	Instructions: <code>-mavx512vbmi</code>.</li>
 	<li>New ISA extensions support
-	<a href="https://software.intel.com/sites/default/files/managed/0d/53/319433-022.pdf">
+	<a href="https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf">
 	Intel MPX</a> was added to GCC.  This new extension is available via the
 	<code>-mmpx</code> compiler switch.  Intel MPX is a set of processor features which,
 	with compiler, run-time library and OS support, brings increased robustness to