@@ -5591,7 +5591,7 @@ (define_expand "fix_trunc<mode>si2"
(fix:SI (match_operand:SFDF 1 "gpc_reg_operand")))]
"TARGET_HARD_FLOAT && <TARGET_FLOAT>"
{
- if (!TARGET_P8_VECTOR)
+ if (!(TARGET_P8_VECTOR && TARGET_DIRECT_MOVE))
{
rtx src = force_reg (<MODE>mode, operands[1]);
@@ -5618,7 +5618,7 @@ (define_insn_and_split "fix_trunc<mode>si2_stfiwx"
"TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT
&& (<MODE>mode != SFmode || TARGET_SINGLE_FLOAT)
&& TARGET_STFIWX && can_create_pseudo_p ()
- && !TARGET_P8_VECTOR"
+ && !(TARGET_P8_VECTOR && TARGET_DIRECT_MOVE)"
"#"
""
[(pc)]
@@ -5659,7 +5659,8 @@ (define_insn_and_split "fix_trunc<mode>si2_internal"
(fix:SI (match_operand:SFDF 1 "gpc_reg_operand" "d,<rreg>")))
(clobber (match_operand:DI 2 "gpc_reg_operand" "=1,d"))
(clobber (match_operand:DI 3 "offsettable_mem_operand" "=o,o"))]
- "TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT && !TARGET_P8_VECTOR"
+ "TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT
+ && !(TARGET_P8_VECTOR && TARGET_DIRECT_MOVE)"
"#"
""
[(pc)]