diff mbox series

[4/4] aarch64: Fix ls64 intrinsic availability

Message ID a5c6d275-1f56-acb5-a04d-48984bc500fb@e124511.cambridge.arm.com
State New
Headers show
Series aarch64: Fix intrinsic availability [PR112108] | expand

Commit Message

Andrew Carlotti Nov. 9, 2023, 11:27 a.m. UTC 
The availability of ls64 intrinsics and data types were determined
solely by the globally specified architecture features, which did not
reflect any changes specified in target pragmas or attributes.

This patch removes the initialisation-time guards for the intrinsics,
and replaces them with checks at use time. We also get better error
messages when ls64 is not available (matching the existing error
messages for SVE intrinsics).

The data512_t type is made always available; this is consistent with the
present behaviour for Neon fp16/bf16 types.

gcc/ChangeLog:

	PR target/112108
	* config/aarch64/aarch64-builtins.cc (handle_arm_acle_h): Remove
	feature check at initialisation.
	(aarch64_check_general_builtin_call): Check ls64 intrinsics.
	(aarch64_expand_builtin_ls64): Add feature check.
	* config/aarch64/arm_acle.h: (data512_t) Make always available.

gcc/testsuite/ChangeLog:

	PR target/112108
	* gcc.target/aarch64/acle/ls64_guard-1.c: New test.
	* gcc.target/aarch64/acle/ls64_guard-2.c: New test.
	* gcc.target/aarch64/acle/ls64_guard-3.c: New test.
	* gcc.target/aarch64/acle/ls64_guard-4.c: New test.
diff mbox series

Patch

diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc
index 503d8ad98d7de959d8c7c78cef575d29e2132f78..9fd0d5c362815c25793bc04a1d82e32bd30bbc22 100644
--- a/gcc/config/aarch64/aarch64-builtins.cc
+++ b/gcc/config/aarch64/aarch64-builtins.cc
@@ -1943,8 +1943,7 @@  aarch64_init_data_intrinsics (void)
 void
 handle_arm_acle_h (void)
 {
-  if (TARGET_LS64)
-    aarch64_init_ls64_builtins ();
+  aarch64_init_ls64_builtins ();
 }
 
 /* Initialize fpsr fpcr getters and setters.  */
@@ -2148,6 +2147,13 @@  bool aarch64_check_general_builtin_call (location_t location,
 	return aarch64_check_required_extensions (location, fndecl,
 						  AARCH64_FL_TME, false);
 
+      case AARCH64_LS64_BUILTIN_LD64B:
+      case AARCH64_LS64_BUILTIN_ST64B:
+      case AARCH64_LS64_BUILTIN_ST64BV:
+      case AARCH64_LS64_BUILTIN_ST64BV0:
+	return aarch64_check_required_extensions (location, fndecl,
+						  AARCH64_FL_LS64, false);
+
       default:
 	break;
     }
@@ -2630,6 +2636,11 @@  aarch64_expand_builtin_ls64 (int fcode, tree exp, rtx target)
 {
   expand_operand ops[3];
 
+  tree fndecl = aarch64_builtin_decls[fcode];
+  if (!aarch64_check_required_extensions (EXPR_LOCATION (exp), fndecl,
+					  AARCH64_FL_LS64, false))
+    return target;
+
   switch (fcode)
     {
     case AARCH64_LS64_BUILTIN_LD64B:
diff --git a/gcc/config/aarch64/arm_acle.h b/gcc/config/aarch64/arm_acle.h
index 57f16603d22cec81002b00b94afe1201c83b4b94..e7aae7e5278691508086e6438b57b8a6fb6df554 100644
--- a/gcc/config/aarch64/arm_acle.h
+++ b/gcc/config/aarch64/arm_acle.h
@@ -235,9 +235,7 @@  __crc32d (uint32_t __a, uint64_t __b)
 #define _TMFAILURE_INT        0x00800000u
 #define _TMFAILURE_TRIVIAL    0x01000000u
 
-#ifdef __ARM_FEATURE_LS64
 typedef __arm_data512_t data512_t;
-#endif
 
 #pragma GCC push_options
 #pragma GCC target ("+nothing+rng")
diff --git a/gcc/testsuite/gcc.target/aarch64/acle/ls64_guard-1.c b/gcc/testsuite/gcc.target/aarch64/acle/ls64_guard-1.c
new file mode 100644
index 0000000000000000000000000000000000000000..7dfc193a2934c994220280990316027c07e75ac4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/acle/ls64_guard-1.c
@@ -0,0 +1,9 @@ 
+/* { dg-do compile } */
+/* { dg-additional-options "-march=armv8.6-a" } */
+
+#include <arm_acle.h>
+
+data512_t foo (void * p)
+{
+  return __arm_ld64b (p); /* { dg-error {ACLE function '__arm_ld64b' requires ISA extension 'ls64'} } */
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/acle/ls64_guard-2.c b/gcc/testsuite/gcc.target/aarch64/acle/ls64_guard-2.c
new file mode 100644
index 0000000000000000000000000000000000000000..3ede05a81f026f8606ee2c9cd56f15ce45caa1c8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/acle/ls64_guard-2.c
@@ -0,0 +1,10 @@ 
+/* { dg-do compile } */
+/* { dg-additional-options "-march=armv8.6-a" } */
+
+#include <arm_acle.h>
+
+#pragma GCC target("arch=armv8-a+ls64")
+data512_t foo (void * p)
+{
+  return __arm_ld64b (p);
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/acle/ls64_guard-3.c b/gcc/testsuite/gcc.target/aarch64/acle/ls64_guard-3.c
new file mode 100644
index 0000000000000000000000000000000000000000..e0fccdad7bec4aa522fb709d010289fd02f91d05
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/acle/ls64_guard-3.c
@@ -0,0 +1,9 @@ 
+/* { dg-do compile } */
+/* { dg-additional-options "-march=armv8-a+ls64 -mgeneral-regs-only" } */
+
+#include <arm_acle.h>
+
+data512_t foo (void * p)
+{
+  return __arm_ld64b (p);
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/acle/ls64_guard-4.c b/gcc/testsuite/gcc.target/aarch64/acle/ls64_guard-4.c
new file mode 100644
index 0000000000000000000000000000000000000000..af1d9a4241fd0047c52735a8103eeaa45525ffc0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/acle/ls64_guard-4.c
@@ -0,0 +1,10 @@ 
+/* { dg-do compile } */
+/* { dg-additional-options "-march=armv8-a+ls64" } */
+
+#include <arm_acle.h>
+
+#pragma GCC target("arch=armv8.6-a")
+data512_t foo (void * p)
+{
+  return __arm_ld64b (p); /* { dg-error {ACLE function '__arm_ld64b' requires ISA extension 'ls64'} } */
+}