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[arm,committed] Clean up code iterator usage in satsi* patterns

Message ID a2dd8720-6aa9-d6a2-e154-59cef7c0ad49@foss.arm.com
State New
Headers show
Series [arm,committed] Clean up code iterator usage in satsi* patterns | expand

Commit Message

Kyrill Tkachov July 25, 2019, 11 a.m. UTC 
Hi all,

GCC 10 now supports having RTL codes being code attributes (thanks 
Richard) allowing us to map smax to smin and vice versa.
This means we can clean up their use in the saturation patterns that do 
the cross product of [smin, smax] and use the pattern
predicate to cancel out the nonsense ones.

Bootstrapped and tested on arm-none-linux-gnueabihf.

Committing to trunk.
Thanks,
Kyrill

2019-07-25  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

     * config/arm/arm.md (SATrev): Change to code attribute.
     (*satsi_<SAT:code>): Adjust for the above.
     (*satsi_<SAT:code>_shift): Likewise.
diff mbox series

Patch

diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 7b90065adba2a19536aeaccfd8f5cf8a501eb266..f11745ba855957da4acec197f2df9c931708062a 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -3981,16 +3981,16 @@ 
 )
 
 (define_code_iterator SAT [smin smax])
-(define_code_iterator SATrev [smin smax])
+(define_code_attr SATrev [(smin "smax") (smax "smin")])
 (define_code_attr SATlo [(smin "1") (smax "2")])
 (define_code_attr SAThi [(smin "2") (smax "1")])
 
 (define_insn "*satsi_<SAT:code>"
   [(set (match_operand:SI 0 "s_register_operand" "=r")
-        (SAT:SI (SATrev:SI (match_operand:SI 3 "s_register_operand" "r")
+        (SAT:SI (<SATrev>:SI (match_operand:SI 3 "s_register_operand" "r")
                            (match_operand:SI 1 "const_int_operand" "i"))
                 (match_operand:SI 2 "const_int_operand" "i")))]
-  "TARGET_32BIT && arm_arch6 && <SAT:CODE> != <SATrev:CODE>
+  "TARGET_32BIT && arm_arch6
    && arm_sat_operator_match (operands[<SAT:SATlo>], operands[<SAT:SAThi>], NULL, NULL)"
 {
   int mask;
@@ -4011,12 +4011,12 @@ 
 
 (define_insn "*satsi_<SAT:code>_shift"
   [(set (match_operand:SI 0 "s_register_operand" "=r")
-        (SAT:SI (SATrev:SI (match_operator:SI 3 "sat_shift_operator"
+        (SAT:SI (<SATrev>:SI (match_operator:SI 3 "sat_shift_operator"
                              [(match_operand:SI 4 "s_register_operand" "r")
                               (match_operand:SI 5 "const_int_operand" "i")])
                            (match_operand:SI 1 "const_int_operand" "i"))
                 (match_operand:SI 2 "const_int_operand" "i")))]
-  "TARGET_32BIT && arm_arch6 && <SAT:CODE> != <SATrev:CODE>
+  "TARGET_32BIT && arm_arch6
    && arm_sat_operator_match (operands[<SAT:SATlo>], operands[<SAT:SAThi>], NULL, NULL)"
 {
   int mask;