diff mbox series

i386: Fix up ix86_expand_int_sse_cmp [PR107585]

Message ID Y2zEZ6f0v/74nBbT@tucnak
State New
Headers show
Series i386: Fix up ix86_expand_int_sse_cmp [PR107585] | expand

Commit Message

Jakub Jelinek Nov. 10, 2022, 9:29 a.m. UTC
Hi!

The following patch fixes ICE on the testcase.  I've used GEN_INT
incorrectly thinking the code punts on the problematic boundaries.
It does, but only for LE and GE, i.e. signed comparisons, for unsigned
the boundaries are 0 and unsigned maximum, so when say unsigned char
adds one to 127 or subtracts one from 128 we need to canonicalize it.

Fixed thusly, bootstrapped/regtested on x86_64-linux and i686-linux,
ok for trunk?

2022-11-10  Jakub Jelinek  <jakub@redhat.com>

	PR target/107585
	PR target/107546
	* config/i386/i386-expand.cc (ix86_expand_int_sse_cmp): Use
	gen_int_mode rather than GEN_INT.

	* gcc.dg/pr107585.c: New test.


	Jakub

Comments

Uros Bizjak Nov. 10, 2022, 9:41 a.m. UTC | #1
On Thu, Nov 10, 2022 at 10:29 AM Jakub Jelinek <jakub@redhat.com> wrote:
>
> Hi!
>
> The following patch fixes ICE on the testcase.  I've used GEN_INT
> incorrectly thinking the code punts on the problematic boundaries.
> It does, but only for LE and GE, i.e. signed comparisons, for unsigned
> the boundaries are 0 and unsigned maximum, so when say unsigned char
> adds one to 127 or subtracts one from 128 we need to canonicalize it.
>
> Fixed thusly, bootstrapped/regtested on x86_64-linux and i686-linux,
> ok for trunk?
>
> 2022-11-10  Jakub Jelinek  <jakub@redhat.com>
>
>         PR target/107585
>         PR target/107546
>         * config/i386/i386-expand.cc (ix86_expand_int_sse_cmp): Use
>         gen_int_mode rather than GEN_INT.
>
>         * gcc.dg/pr107585.c: New test.

OK as an obvious patch.

Thanks,
Uros.

>
> --- gcc/config/i386/i386-expand.cc.jj   2022-11-08 12:21:48.704047171 +0100
> +++ gcc/config/i386/i386-expand.cc      2022-11-09 14:40:12.157012775 +0100
> @@ -4540,7 +4540,8 @@ ix86_expand_int_sse_cmp (rtx dest, enum
>                   rtvec v = rtvec_alloc (n_elts);
>                   for (i = 0; i < n_elts; ++i)
>                     RTVEC_ELT (v, i)
> -                     = GEN_INT (INTVAL (CONST_VECTOR_ELT (cop1, i)) + 1);
> +                     = gen_int_mode (INTVAL (CONST_VECTOR_ELT (cop1, i)) + 1,
> +                                     eltmode);
>                   cop1 = gen_rtx_CONST_VECTOR (mode, v);
>                   std::swap (cop0, cop1);
>                   code = code == LE ? GT : GTU;
> @@ -4584,7 +4585,8 @@ ix86_expand_int_sse_cmp (rtx dest, enum
>                   rtvec v = rtvec_alloc (n_elts);
>                   for (i = 0; i < n_elts; ++i)
>                     RTVEC_ELT (v, i)
> -                     = GEN_INT (INTVAL (CONST_VECTOR_ELT (cop1, i)) - 1);
> +                     = gen_int_mode (INTVAL (CONST_VECTOR_ELT (cop1, i)) - 1,
> +                                     eltmode);
>                   cop1 = gen_rtx_CONST_VECTOR (mode, v);
>                   code = code == GE ? GT : GTU;
>                   break;
> --- gcc/testsuite/gcc.dg/pr107585.c.jj  2022-11-09 14:52:37.554779118 +0100
> +++ gcc/testsuite/gcc.dg/pr107585.c     2022-11-09 14:48:24.063258991 +0100
> @@ -0,0 +1,13 @@
> +/* PR target/107585 */
> +/* { dg-do compile } */
> +/* { dg-options "-O2" } */
> +
> +typedef unsigned char __attribute__((__vector_size__ (16))) V;
> +char c;
> +void bar (int);
> +
> +void
> +foo (void)
> +{
> +  bar (((V) (c <= (V){127}))[2]);
> +}
>
>         Jakub
>
diff mbox series

Patch

--- gcc/config/i386/i386-expand.cc.jj	2022-11-08 12:21:48.704047171 +0100
+++ gcc/config/i386/i386-expand.cc	2022-11-09 14:40:12.157012775 +0100
@@ -4540,7 +4540,8 @@  ix86_expand_int_sse_cmp (rtx dest, enum
 		  rtvec v = rtvec_alloc (n_elts);
 		  for (i = 0; i < n_elts; ++i)
 		    RTVEC_ELT (v, i)
-		      = GEN_INT (INTVAL (CONST_VECTOR_ELT (cop1, i)) + 1);
+		      = gen_int_mode (INTVAL (CONST_VECTOR_ELT (cop1, i)) + 1,
+				      eltmode);
 		  cop1 = gen_rtx_CONST_VECTOR (mode, v);
 		  std::swap (cop0, cop1);
 		  code = code == LE ? GT : GTU;
@@ -4584,7 +4585,8 @@  ix86_expand_int_sse_cmp (rtx dest, enum
 		  rtvec v = rtvec_alloc (n_elts);
 		  for (i = 0; i < n_elts; ++i)
 		    RTVEC_ELT (v, i)
-		      = GEN_INT (INTVAL (CONST_VECTOR_ELT (cop1, i)) - 1);
+		      = gen_int_mode (INTVAL (CONST_VECTOR_ELT (cop1, i)) - 1,
+				      eltmode);
 		  cop1 = gen_rtx_CONST_VECTOR (mode, v);
 		  code = code == GE ? GT : GTU;
 		  break;
--- gcc/testsuite/gcc.dg/pr107585.c.jj	2022-11-09 14:52:37.554779118 +0100
+++ gcc/testsuite/gcc.dg/pr107585.c	2022-11-09 14:48:24.063258991 +0100
@@ -0,0 +1,13 @@ 
+/* PR target/107585 */
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+typedef unsigned char __attribute__((__vector_size__ (16))) V;
+char c;
+void bar (int);
+
+void
+foo (void)
+{
+  bar (((V) (c <= (V){127}))[2]);
+}