From patchwork Tue May 28 17:11:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wilco Dijkstra X-Patchwork-Id: 1106414 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-501793-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="HPqWKHeL"; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=armh.onmicrosoft.com header.i=@armh.onmicrosoft.com header.b="4ToBjWLV"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45D0kT33pHz9s3Z for ; Wed, 29 May 2019 03:11:43 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:content-type :content-transfer-encoding:mime-version; q=dns; s=default; b=q8E GgzKxtLqb50dcYOJq1XkkPRDfNzbtCTPdUpdROc4zdryahI51Vp5HAMxxKm+Hw04 sUKAVSx3BVRfCU3lKB9LFeIM2HKefsJz6dQNREdbwirwibDWGuavHB6dGG9FCAjK U0TFw3hHdVMnJQcJCCdYyW01I6WoQSRviBYvj8Ek= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:content-type :content-transfer-encoding:mime-version; s=default; bh=cgsMextlN kRpLguEMVIc3EPG8qM=; b=HPqWKHeL140dRfsTKnH3LRwMWPa2SSMNzrVkMIoaj 3CtPFXvwCID27wdM7aVwC2ugjntUQsN5iJJk08BrwToCM6DJZ7eUV9w29LhVdZ3O T/MD2CgCq2twv9O8qL9weF6/BV5OIF2oJNJsO+OM0mu3V6BydP5YXRw6zDBsdxPs +M= Received: (qmail 77746 invoked by alias); 28 May 2019 17:11:36 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 77736 invoked by uid 89); 28 May 2019 17:11:36 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-17.5 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_NUMSUBJECT, RCVD_IN_DNSWL_NONE, SPF_HELO_PASS autolearn=ham version=3.3.1 spammy=ds, cvt, HX-Languages-Length:2246 X-HELO: EUR01-VE1-obe.outbound.protection.outlook.com Received: from mail-eopbgr140045.outbound.protection.outlook.com (HELO EUR01-VE1-obe.outbound.protection.outlook.com) (40.107.14.45) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 28 May 2019 17:11:34 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=ao5Cu9ubo9mI53hMFzBJciKQxUUwl+uGN4KrF/3ztiY=; b=4ToBjWLVGhPAFvlhPBkl0V8gjyxPmGvIYGKPtBSO57ncm/UDTcimf9Xudua/NA/WJvDpM2ADYTLgTX3XdO/9usM40Hp7fW3RRoVqRvU0PKdOZ++izMbEFmYDzzBBGPj+haMQ38GjtNcsuZDPNdkyPDF1zjYLoFH4iTvVQHW5mWM= Received: from VI1PR0801MB2127.eurprd08.prod.outlook.com (10.168.62.22) by VI1PR0801MB2111.eurprd08.prod.outlook.com (10.173.75.149) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1922.16; Tue, 28 May 2019 17:11:30 +0000 Received: from VI1PR0801MB2127.eurprd08.prod.outlook.com ([fe80::fd18:cb50:3e52:9878]) by VI1PR0801MB2127.eurprd08.prod.outlook.com ([fe80::fd18:cb50:3e52:9878%7]) with mapi id 15.20.1922.021; Tue, 28 May 2019 17:11:30 +0000 From: Wilco Dijkstra To: GCC Patches , Richard Earnshaw , Ramana Radhakrishnan , James Greenhalgh , Richard Sandiford CC: nd Subject: [PATCH][AArch64] Fix PR81800 Date: Tue, 28 May 2019 17:11:29 +0000 Message-ID: authentication-results: spf=none (sender IP is ) smtp.mailfrom=Wilco.Dijkstra@arm.com; x-ms-oob-tlc-oobclassifiers: OLM:510; received-spf: None (protection.outlook.com: arm.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 MIME-Version: 1.0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: Wilco.Dijkstra@arm.com PR81800 is about the lrint inline giving spurious FE_INEXACT exceptions. The previous change for PR81800 didn't fix this: when lrint is disabled in the backend, the midend will simply use llrint. This actually makes things worse since llrint now also ignores FE_INVALID exceptions! The fix is to disable lrint/llrint on double if the size of a long is smaller (ie. ilp32). Passes regress and bootstrap on AArch64. OK for commit? ChangeLog 2018-11-13 Wilco Dijkstra gcc/ PR target/81800 * gcc/config/aarch64/aarch64.md (lrint): Disable lrint pattern if GPF operand is larger than a long int. testsuite/ PR target/81800 * gcc.target/aarch64/no-inline-lrint_3.c: New test. diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 5a1894063a1ed2db1cc947c9c449d48808ed96ae..f08cd0930b3fc6527fbca218ad3c464f1ead0103 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -6304,7 +6304,7 @@ (define_expand "lrint2" [(match_operand:GPI 0 "register_operand") (match_operand:GPF 1 "register_operand")] "TARGET_FLOAT - && ((GET_MODE_SIZE (mode) <= GET_MODE_SIZE (mode)) + && ((GET_MODE_BITSIZE (mode) <= LONG_TYPE_SIZE) || !flag_trapping_math || flag_fp_int_builtin_inexact)" { rtx cvt = gen_reg_rtx (mode); diff --git a/gcc/testsuite/gcc.target/aarch64/no-inline-lrint_3.c b/gcc/testsuite/gcc.target/aarch64/no-inline-lrint_3.c new file mode 100644 index 0000000000000000000000000000000000000000..ca772cb999e7b6cfbd3f080111d3eb479d43f47b --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/no-inline-lrint_3.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target ilp32 } */ +/* { dg-options "-O3 -fno-math-errno -fno-fp-int-builtin-inexact" } */ + +#define TEST(name, float_type, int_type, fn) void f_##name (float_type x) \ +{ \ + volatile int_type b = __builtin_##fn (x); \ +} + +TEST (dld, double, long, lrint) +TEST (flf, float , long, lrintf) + +TEST (did, double, int, lrint) +TEST (fif, float , int, lrintf) + +/* { dg-final { scan-assembler-times "fcvtzs\tw\[0-9\]+, \[d,s\]\[0-9\]+" 2 } } */ +/* { dg-final { scan-assembler-times "bl\tlrint" 2 } } */