| Message ID | VI1PR0801MB20317267AF6ED3C4CFCF7F5BFF760@VI1PR0801MB2031.eurprd08.prod.outlook.com |
|---|---|
| State | New |
| Headers | show |
On Fri, Jan 27, 2017 at 10:30 AM, Tamar Christina <Tamar.Christina@arm.com> wrote: > Hi all, > > This fixes (PR78142) by only creating one vector in the char case. > r241590 is causing more registers to be used and so > the SP registered happens to be picked and used. > > This test I believe was checking explicitly that the > SP is not used if not needed. By creating a single vector then less > registers are needed so SP won't be used. The test is written that way because our previuos vector initialization code involved constructing the initializer on the stack and then reloading it into the vector registers instead of constructing the vector initializer through a sequence of ins instructions which is what we changed the vector initialization code to. I think it helped hmmer (?) but memory is fading .... :) [Patch AArch64] GCC 6 regression in vector performance. - Fix vector initialization to happen with lane load instructions. gcc/ * config/aarch64/aarch64.c (aarch64_expand_vector_init): Refactor, always use lane loads to construct non-constant vectors. gcc/testsuite/ * gcc.target/aarch64/vector_initialization_nostack.c: New. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@233461 138bc75d-0d04-0410-961f-82ee72b054a4 regards Ramana > > Ran regression tests on aarch64-none-linux-gnu. > > Ok for trunk? > > Thanks, > Tamar > > gcc/testsuite/ > > 2017-01-26 Tamar Christina <tamar.christina@arm.com> > > PR middle-end/78142 > * gcc.target/aarch64/vector_initialization_nostack.c > (f12): Use one vector.
On Fri, Jan 27, 2017 at 10:55:34AM +0000, Ramana Radhakrishnan wrote: > On Fri, Jan 27, 2017 at 10:30 AM, Tamar Christina > <Tamar.Christina@arm.com> wrote: > > Hi all, > > > > This fixes (PR78142) by only creating one vector in the char case. > > r241590 is causing more registers to be used and so > > the SP registered happens to be picked and used. > > > > This test I believe was checking explicitly that the > > SP is not used if not needed. By creating a single vector then less > > registers are needed so SP won't be used. > > > > The test is written that way because our previuos vector > initialization code involved constructing the initializer on the stack > and then reloading it into the vector registers instead of > constructing the vector initializer through a sequence of ins > instructions which is what we changed the vector initialization code > to. I think it helped hmmer (?) but memory is fading .... :) It seems to me that running with one vector still tests that behaviour, but removes the risk of accidentally failing when some other element of the compiler goes wrong and needs 32 general-purpose registers live to acheieve the initialisation. If there's a real bug here that causes the extra resource usage, then it would be nice to isolate it and have a PR opened. However, this patch gets the test closer to testing a single compiler behaviour, so this is OK for trunk. Thanks for the fix. James > > gcc/testsuite/ > > > > 2017-01-26 Tamar Christina <tamar.christina@arm.com> > > > > PR middle-end/78142 > > * gcc.target/aarch64/vector_initialization_nostack.c > > (f12): Use one vector.
diff --git a/gcc/testsuite/gcc.target/aarch64/vector_initialization_nostack.c b/gcc/testsuite/gcc.target/aarch64/vector_initialization_nostack.c index bbad04d00263b6a91b826b4911af92bdd226c821..bf43f1cd72ec4e636dbd45534c9ab348bee8febc 100644 --- a/gcc/testsuite/gcc.target/aarch64/vector_initialization_nostack.c +++ b/gcc/testsuite/gcc.target/aarch64/vector_initialization_nostack.c @@ -38,14 +38,14 @@ f11 (void) return sum; } -char arr_c[100][100]; +char arr_c[100]; char f12 (void) { int i; char sum = 0; for (i = 0; i < 100; i++) - sum += arr_c[i][0] * arr_c[0][i]; + sum += arr_c[i] * arr_c[i]; return sum; }