diff mbox series

[pushed] testsuite, X86 : Add target requires masm_intel to three tests.

Message ID F3721719-9D32-4675-81CB-ED50F4EA4E3D@sandoe.co.uk
State New
Headers show
Series [pushed] testsuite, X86 : Add target requires masm_intel to three tests. | expand

Commit Message

Iain Sandoe Nov. 1, 2020, 4:34 p.m. UTC 
Hi

These tests currently fail on targets without Intel assembler support.

Tested that they are now UNSUPPORTED on x86_64-darwin, which does not
have -masm=intel support.

pushed to master as trivial/obvious.
thanks
Iain

gcc/testsuite/ChangeLog:

	* gcc.target/i386/amxbf16-asmintel-1.c: Require masm_intel.
	* gcc.target/i386/amxint8-asmintel-1.c: Likewise.
	* gcc.target/i386/amxtile-asmintel-1.c: Likewise.
---
  gcc/testsuite/gcc.target/i386/amxbf16-asmintel-1.c | 1 +
  gcc/testsuite/gcc.target/i386/amxint8-asmintel-1.c | 1 +
  gcc/testsuite/gcc.target/i386/amxtile-asmintel-1.c | 1 +
  3 files changed, 3 insertions(+)
diff mbox series

Patch

diff --git a/gcc/testsuite/gcc.target/i386/amxbf16-asmintel-1.c  
b/gcc/testsuite/gcc.target/i386/amxbf16-asmintel-1.c
index c2d6074387a..54194e1c5b0 100644
--- a/gcc/testsuite/gcc.target/i386/amxbf16-asmintel-1.c
+++ b/gcc/testsuite/gcc.target/i386/amxbf16-asmintel-1.c
@@ -1,4 +1,5 @@ 
  /* { dg-do compile { target { ! ia32 } } } */
+/* { dg-require-effective-target masm_intel } */
  /* { dg-options "-O2 -mamx-bf16 -masm=intel" } */
  /* { dg-final { scan-assembler "tdpbf16ps\[ \\t]+\[^\n\]*%tmm1+\[^\n\]*%tmm2+\[^\n\]*%tmm3"  } } */
  #include <immintrin.h>
diff --git a/gcc/testsuite/gcc.target/i386/amxint8-asmintel-1.c  
b/gcc/testsuite/gcc.target/i386/amxint8-asmintel-1.c
index bcfbb3fa5ed..f8c376ae6c4 100644
--- a/gcc/testsuite/gcc.target/i386/amxint8-asmintel-1.c
+++ b/gcc/testsuite/gcc.target/i386/amxint8-asmintel-1.c
@@ -1,4 +1,5 @@ 
  /* { dg-do compile { target { ! ia32 } } } */
+/* { dg-require-effective-target masm_intel } */
  /* { dg-options "-O2 -mamx-int8 -masm=intel" } */
  /* { dg-final { scan-assembler "tdpbssd\[ \\t]+\[^\n\]*%tmm1+\[^\n\]*%tmm2+\[^\n\]*%tmm3"  } } */
  /* { dg-final { scan-assembler "tdpbsud\[ \\t]+\[^\n\]*%tmm1+\[^\n\]*%tmm2+\[^\n\]*%tmm3"  } } *
diff --git a/gcc/testsuite/gcc.target/i386/amxtile-asmintel-1.c  
b/gcc/testsuite/gcc.target/i386/amxtile-asmintel-1.c
index 88ef612ed14..6c08fec516c 100644
--- a/gcc/testsuite/gcc.target/i386/amxtile-asmintel-1.c
+++ b/gcc/testsuite/gcc.target/i386/amxtile-asmintel-1.c
@@ -1,4 +1,5 @@ 
  /* { dg-do compile { target { ! ia32 } } } */
+/* { dg-require-effective-target masm_intel } */
  /* { dg-options "-O2 -mamx-tile -masm=intel " } */
  /* { dg-final { scan-assembler "ldtilecfg\[ \\t]"  } } */
  /* { dg-final { scan-assembler "sttilecfg\[ \\t]"  } } */