@@ -293,6 +293,23 @@
[(set_attr "type" "no_insn")]
)
+(define_insn "prefetch"
+ [(prefetch (match_operand:DI 0 "register_operand" "r")
+ (match_operand:QI 1 "const_int_operand" "n")
+ (match_operand:QI 2 "const_int_operand" "n"))]
+ ""
+ "*
+{
+ if (INTVAL(operands[2]) == 0)
+ /* no temporal locality */
+ return (INTVAL(operands[1])) ? \"prfm\\tPSTL1STRM, [%0, #0]\" :
+\"prfm\\tPLDL1STRM, [%0, #0]\";
+
+ /* temporal locality */
+ return (INTVAL(operands[1])) ? \"prfm\\tPSTL1KEEP, [%0, #0]\" :
+\"prfm\\tPLDL1KEEP, [%0, #0]\"; }"
+ [(set_attr "type" "prefetch")]
+)
+
(define_insn "trap"
[(trap_if (const_int 1) (const_int 8))]
""
@@ -117,6 +117,7 @@
; mvn_shift_reg inverting move instruction, shifted operand by a register.
; no_insn an insn which does not represent an instruction in the
; final output, thus having no impact on scheduling.
+; prefetch a prefetch instruction
; rbit reverse bits.
; rev reverse bytes.
; sdiv signed division.
@@ -553,6 +554,7 @@
call,\
clz,\
no_insn,\
+ prefetch,\
csel,\
crc,\
extend,\
With the locality value received in the instruction pattern, I think it would be safe to handle them in prefetch instruction. This helps especially AArch64 has prefetch instructions that can handle this locality. +(define_insn "prefetch" + [(prefetch (match_operand:DI 0 "address_operand" "r") + (match_operand:QI 1 "const_int_operand" "n") + (match_operand:QI 2 "const_int_operand" "n"))] + "" + "* +{ + int locality = INTVAL (operands[2]); + + gcc_assert (IN_RANGE (locality, 0, 3)); + + if (locality == 0) + /* non temporal locality */ + return (INTVAL(operands[1])) ? \"prfm\\tPSTL1STRM, [%0, #0]\" : \"prfm\\tPLDL1STRM, [%0, #0]\"; + + /* temporal locality */ + return (INTVAL(operands[1])) ? \"prfm\\tPSTL%2KEEP, [%0, #0]\" : \"prfm\\tPLDL%2KEEP, [%0, #0]\"; +}" + [(set_attr "type" "prefetch")] +) + I also have attached a patch that implements * Prefetch with immediate offset in the range 0 to 32760 (multiple of 8). Added a predicate for this. * Prefetch with immediate offset - in the range -256 to 255 (Gets generated only when we have a negative offset. Generates prfum instruction). Added a predicate for this. * Prefetch with register offset. (modified for printing the locality) Regards Ganesh -----Original Message----- From: Philipp Tomsich [mailto:philipp.tomsich@theobroma-systems.com] Sent: Wednesday, February 19, 2014 2:40 AM To: gcc-patches@gcc.gnu.org Cc: philipp.tomsich@theobroma-systems.com Subject: [AArch64 05/14] Add AArch64 'prefetch'-pattern. --- gcc/config/aarch64/aarch64.md | 17 +++++++++++++++++ gcc/config/arm/types.md | 2 ++ 2 files changed, 19 insertions(+) -- 1.9.0