@@ -34,6 +34,8 @@
(define_cpu_unit "bdver3-decode0" "bdver3")
(define_cpu_unit "bdver3-decode1" "bdver3")
+(define_cpu_unit "bdver3-decode2" "bdver3")
+(define_cpu_unit "bdver3-decode3" "bdver3")
(define_cpu_unit "bdver3-decodev" "bdver3")
;; Double decoded instructions take two cycles whereas
@@ -42,12 +44,15 @@
;; two decoders in two cycles.
;; Vectorpath instructions are single issue instructions.
;; So, we have separate unit for vector instructions.
-(exclusion_set "bdver3-decodev" "bdver3-decode0,bdver3-decode1")
+(exclusion_set "bdver3-decodev" "bdver3-decode0,bdver3-decode1,bdver3-decode2,bdver3-decode3")
(define_reservation "bdver3-vector" "bdver3-decodev")
-(define_reservation "bdver3-direct" "(bdver3-decode0|bdver3-decode1)")
+(define_reservation "bdver3-direct" "(bdver3-decode0|bdver3-decode1|bdver3-decoder2|bdver3-decoder3)")
-(define_reservation "bdver3-double" "(bdver3-decode0|bdver3-decode1)*2")
+(define_reservation "bdver3-double" "(bdver3-decode0+bdver3-decode1)|
+ (bdver3-decode1+bdver3-decode2)|(bdver3-decode2+bdver3-decode3)|
+ (bdver3-decode0+bdver3-decode2)|(bdver3-decode1+bdver3-decode3)|
+ (bdver3-decode0+bdver3-decode3)")
-----Original Message-----
From: Jan Hubicka [mailto:hubicka@ucw.cz]