diff mbox series

[1/8,APX,NF] : Support APX NF add

Message ID DM4PR11MB54875F424AA0C150F24FC791ECEC2@DM4PR11MB5487.namprd11.prod.outlook.com
State New
Headers show
Series [1/8,APX,NF] : Support APX NF add | expand

Commit Message

Kong, Lingling May 15, 2024, 7:43 a.m. UTC 
From: Hongyu Wang <hongyu.wang@intel.com>

APX NF(no flags) feature implements suppresses the update of status flags for arithmetic operations.

For NF add, it is not clear whether NF add can be faster than lea. If so, the pattern needs to be adjusted to prefer LEA generation.

gcc/ChangeLog:

        * config/i386/i386-opts.h (enum apx_features): Add nf
        enumeration.
        * config/i386/i386.h (TARGET_APX_NF): New.
        * config/i386/i386.md (*add<mode>_1_nf): New define_insn.
        * config/i386/i386.opt: Add apx_nf enumeration.

gcc/testsuite/ChangeLog:

        * gcc.target/i386/apx-ndd.c: Fixed test.
        * gcc.target/i386/apx-nf.c: New test.

Co-authored-by: Lingling Kong <lingling.kong@intel.com>

Bootstrapped and regtested on x86_64-linux-gnu. And Supported SPEC 2017 run normally on Intel software development emulator.
Ok for trunk?

---
 gcc/config/i386/i386-opts.h             |  3 +-
 gcc/config/i386/i386.h                  |  1 +
 gcc/config/i386/i386.md                 | 42 +++++++++++++++++++++++++
 gcc/config/i386/i386.opt                |  3 ++
 gcc/testsuite/gcc.target/i386/apx-ndd.c |  2 +-
 gcc/testsuite/gcc.target/i386/apx-nf.c  |  6 ++++
 6 files changed, 55 insertions(+), 2 deletions(-)  create mode 100644 gcc/testsuite/gcc.target/i386/apx-nf.c

+
--
2.31.1

Comments

Uros Bizjak May 15, 2024, 8:14 a.m. UTC | #1 
On Wed, May 15, 2024 at 9:43 AM Kong, Lingling <lingling.kong@intel.com> wrote:
>
> From: Hongyu Wang <hongyu.wang@intel.com>
>
> APX NF(no flags) feature implements suppresses the update of status flags for arithmetic operations.
>
> For NF add, it is not clear whether NF add can be faster than lea. If so, the pattern needs to be adjusted to prefer LEA generation.

> diff --git a/gcc/testsuite/gcc.target/i386/apx-ndd.c b/gcc/testsuite/gcc.target/i386/apx-ndd.c
> index 0eb751ad225..0ff4df0780c 100644
> --- a/gcc/testsuite/gcc.target/i386/apx-ndd.c
> +++ b/gcc/testsuite/gcc.target/i386/apx-ndd.c
> @@ -1,5 +1,5 @@
>  /* { dg-do compile { target { ! ia32 } } } */
> -/* { dg-options "-mapxf -march=x86-64 -O2" } */
> +/* { dg-options "-mapx-features=egpr,push2pop2,ndd,ppx -march=x86-64
> +-O2" } */

Please do not split options to a separate line; here and in other places.

Uros.
Kong, Lingling May 15, 2024, 8:36 a.m. UTC | #2 
> -----Original Message-----
> From: Uros Bizjak <ubizjak@gmail.com>
> Sent: Wednesday, May 15, 2024 4:15 PM
> To: Kong, Lingling <lingling.kong@intel.com>
> Cc: gcc-patches@gcc.gnu.org; Liu, Hongtao <hongtao.liu@intel.com>; Wang,
> Hongyu <hongyu.wang@intel.com>
> Subject: Re: [PATCH 1/8] [APX NF]: Support APX NF add
> 
> On Wed, May 15, 2024 at 9:43 AM Kong, Lingling <lingling.kong@intel.com>
> wrote:
> >
> > From: Hongyu Wang <hongyu.wang@intel.com>
> >
> > APX NF(no flags) feature implements suppresses the update of status flags for
> arithmetic operations.
> >
> > For NF add, it is not clear whether NF add can be faster than lea. If so, the
> pattern needs to be adjusted to prefer LEA generation.
> 
> > diff --git a/gcc/testsuite/gcc.target/i386/apx-ndd.c
> > b/gcc/testsuite/gcc.target/i386/apx-ndd.c
> > index 0eb751ad225..0ff4df0780c 100644
> > --- a/gcc/testsuite/gcc.target/i386/apx-ndd.c
> > +++ b/gcc/testsuite/gcc.target/i386/apx-ndd.c
> > @@ -1,5 +1,5 @@
> >  /* { dg-do compile { target { ! ia32 } } } */
> > -/* { dg-options "-mapxf -march=x86-64 -O2" } */
> > +/* { dg-options "-mapx-features=egpr,push2pop2,ndd,ppx -march=x86-64
> > +-O2" } */
> 
> Please do not split options to a separate line; here and in other places.
> 
> Uros.

Sorry,  my send-email adjusted some formatting incorrectly, I added attachments.

Thanks, 
Lingling
Uros Bizjak May 15, 2024, 8:46 a.m. UTC | #3 
On Wed, May 15, 2024 at 9:43 AM Kong, Lingling <lingling.kong@intel.com> wrote:
>
> From: Hongyu Wang <hongyu.wang@intel.com>
>
> APX NF(no flags) feature implements suppresses the update of status flags for arithmetic operations.
>
> For NF add, it is not clear whether NF add can be faster than lea. If so, the pattern needs to be adjusted to prefer LEA generation.
>
> gcc/ChangeLog:
>
>         * config/i386/i386-opts.h (enum apx_features): Add nf
>         enumeration.
>         * config/i386/i386.h (TARGET_APX_NF): New.
>         * config/i386/i386.md (*add<mode>_1_nf): New define_insn.
>         * config/i386/i386.opt: Add apx_nf enumeration.
>
> gcc/testsuite/ChangeLog:
>
>         * gcc.target/i386/apx-ndd.c: Fixed test.
>         * gcc.target/i386/apx-nf.c: New test.
>
> Co-authored-by: Lingling Kong <lingling.kong@intel.com>
>
> Bootstrapped and regtested on x86_64-linux-gnu. And Supported SPEC 2017 run normally on Intel software development emulator.
> Ok for trunk?
>
> ---
>  gcc/config/i386/i386-opts.h             |  3 +-
>  gcc/config/i386/i386.h                  |  1 +
>  gcc/config/i386/i386.md                 | 42 +++++++++++++++++++++++++
>  gcc/config/i386/i386.opt                |  3 ++
>  gcc/testsuite/gcc.target/i386/apx-ndd.c |  2 +-
>  gcc/testsuite/gcc.target/i386/apx-nf.c  |  6 ++++
>  6 files changed, 55 insertions(+), 2 deletions(-)  create mode 100644 gcc/testsuite/gcc.target/i386/apx-nf.c
>
> diff --git a/gcc/config/i386/i386-opts.h b/gcc/config/i386/i386-opts.h index ef2825803b3..60176ce609f 100644
> --- a/gcc/config/i386/i386-opts.h
> +++ b/gcc/config/i386/i386-opts.h
> @@ -140,7 +140,8 @@ enum apx_features {
>    apx_push2pop2 = 1 << 1,
>    apx_ndd = 1 << 2,
>    apx_ppx = 1 << 3,
> -  apx_all = apx_egpr | apx_push2pop2 | apx_ndd | apx_ppx,
> +  apx_nf = 1<< 4,
> +  apx_all = apx_egpr | apx_push2pop2 | apx_ndd | apx_ppx | apx_nf,
>  };
>
>  #endif
> diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 529edff93a4..f20ae4726da 100644
> --- a/gcc/config/i386/i386.h
> +++ b/gcc/config/i386/i386.h
> @@ -55,6 +55,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see  #define TARGET_APX_PUSH2POP2 (ix86_apx_features & apx_push2pop2)  #define TARGET_APX_NDD (ix86_apx_features & apx_ndd)  #define TARGET_APX_PPX (ix86_apx_features & apx_ppx)
> +#define TARGET_APX_NF (ix86_apx_features & apx_nf)
>
>  #include "config/vxworks-dummy.h"
>
> diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 764bfe20ff2..4a9e35c4990 100644
> --- a/gcc/config/i386/i386.md
> +++ b/gcc/config/i386/i386.md
> @@ -6233,6 +6233,48 @@
>      }
>  })
>
>
> +;; NF instructions.
> +
> +(define_insn "*add<mode>_1_nf"
> +  [(set (match_operand:SWI 0 "nonimmediate_operand" "=rm,rje,r,r,r,r,r,r")
> +       (plus:SWI
> +         (match_operand:SWI 1 "nonimmediate_operand" "%0,0,0,r,r,rje,jM,r")
> +         (match_operand:SWI 2 "x86_64_general_operand"
> +"r,e,BM,0,le,r,e,BM")))]
> +  "TARGET_APX_NF &&
> +   ix86_binary_operator_ok (PLUS, <MODE>mode, operands,
> +                           TARGET_APX_NDD)"

I wonder if we can use "define_subst" to conditionally add flags
clobber for !TARGET_APX_NF targets. Even the example for "Define
Subst" uses the insn w/ and w/o the clobber, so I think it is worth
considering this approach.

Uros.
diff mbox series

Patch

diff --git a/gcc/config/i386/i386-opts.h b/gcc/config/i386/i386-opts.h index ef2825803b3..60176ce609f 100644
--- a/gcc/config/i386/i386-opts.h
+++ b/gcc/config/i386/i386-opts.h
@@ -140,7 +140,8 @@  enum apx_features {
   apx_push2pop2 = 1 << 1,
   apx_ndd = 1 << 2,
   apx_ppx = 1 << 3,
-  apx_all = apx_egpr | apx_push2pop2 | apx_ndd | apx_ppx,
+  apx_nf = 1<< 4,
+  apx_all = apx_egpr | apx_push2pop2 | apx_ndd | apx_ppx | apx_nf,
 };
 
 #endif
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 529edff93a4..f20ae4726da 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -55,6 +55,7 @@  see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see  #define TARGET_APX_PUSH2POP2 (ix86_apx_features & apx_push2pop2)  #define TARGET_APX_NDD (ix86_apx_features & apx_ndd)  #define TARGET_APX_PPX (ix86_apx_features & apx_ppx)
+#define TARGET_APX_NF (ix86_apx_features & apx_nf)
 
 #include "config/vxworks-dummy.h"
 
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 764bfe20ff2..4a9e35c4990 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -6233,6 +6233,48 @@ 
     }
 })
 

+;; NF instructions.
+
+(define_insn "*add<mode>_1_nf"
+  [(set (match_operand:SWI 0 "nonimmediate_operand" "=rm,rje,r,r,r,r,r,r")
+	(plus:SWI
+	  (match_operand:SWI 1 "nonimmediate_operand" "%0,0,0,r,r,rje,jM,r")
+	  (match_operand:SWI 2 "x86_64_general_operand" 
+"r,e,BM,0,le,r,e,BM")))]
+  "TARGET_APX_NF &&
+   ix86_binary_operator_ok (PLUS, <MODE>mode, operands,
+			    TARGET_APX_NDD)"
+{
+  bool use_ndd = get_attr_isa (insn) == ISA_APX_NDD;
+  if (which_alternative == 3)
+      std::swap (operands[1], operands[2]);
+
+  if (operands[2] == const1_rtx)
+    return use_ndd
+	  ? "%{nf%} inc{<imodesuffix>}\t{%1, %0|%0, %1}"
+	  : "%{nf%} inc{<imodesuffix>}\t{%0|%0}";
+
+  if (operands[2] == constm1_rtx)
+    return use_ndd
+	  ? "%{nf%} dec{<imodesuffix>}\t{%1, %0|%0, %1}"
+	  : "%{nf%} dec{<imodesuffix>}\t{%0|%0}";
+
+  return use_ndd
+	 ? "%{nf%} add{<imodesuffix>}\t{%2, %1, %0|%0, %1, %2}"
+	 : "%{nf%} add{<imodesuffix>}\t{%2, %0|%0, %2}"; }
+  [(set_attr "isa" "*,*,*,*,apx_ndd,apx_ndd,apx_ndd,apx_ndd")
+   (set (attr "type")
+     (cond [(eq_attr "alternative" "4")
+              (const_string "lea")
+	   ]
+	   (const_string "alu")))
+   (set (attr "length_immediate")
+      (if_then_else
+	(and (eq_attr "type" "alu") (match_operand 2 "const128_operand"))
+	(const_string "1")
+	(const_string "*")))
+   (set_attr "mode" "<MODE>")])
+
 ;; Load effective address instructions
 
 (define_insn "*lea<mode>"
diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt index d5f793a9e8b..66021d59d4e 100644
--- a/gcc/config/i386/i386.opt
+++ b/gcc/config/i386/i386.opt
@@ -1356,6 +1356,9 @@  Enum(apx_features) String(ndd) Value(apx_ndd) Set(4)  EnumValue
 Enum(apx_features) String(ppx) Value(apx_ppx) Set(5)
 
+EnumValue
+Enum(apx_features) String(nf) Value(apx_nf) Set(6)
+
 EnumValue
 Enum(apx_features) String(all) Value(apx_all) Set(1)
 
diff --git a/gcc/testsuite/gcc.target/i386/apx-ndd.c b/gcc/testsuite/gcc.target/i386/apx-ndd.c
index 0eb751ad225..0ff4df0780c 100644
--- a/gcc/testsuite/gcc.target/i386/apx-ndd.c
+++ b/gcc/testsuite/gcc.target/i386/apx-ndd.c
@@ -1,5 +1,5 @@ 
 /* { dg-do compile { target { ! ia32 } } } */
-/* { dg-options "-mapxf -march=x86-64 -O2" } */
+/* { dg-options "-mapx-features=egpr,push2pop2,ndd,ppx -march=x86-64 
+-O2" } */
 /* { dg-final { scan-assembler-not "movl"} } */
 
 #include <stdint.h>
diff --git a/gcc/testsuite/gcc.target/i386/apx-nf.c b/gcc/testsuite/gcc.target/i386/apx-nf.c
new file mode 100644
index 00000000000..3adc7a27902
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/apx-nf.c
@@ -0,0 +1,6 @@ 
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-mapx-features=egpr,push2pop2,ndd,ppx,nf -march=x86-64 
+-O2" } */
+/* { dg-final { scan-assembler-times "\{nf\} add" 4 } } */
+
+#include "apx-ndd.c"