From patchwork Wed Nov 14 12:32:14 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wilco Dijkstra X-Patchwork-Id: 997666 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-490036-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="s8/7FOpi"; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=armh.onmicrosoft.com header.i=@armh.onmicrosoft.com header.b="k8iZuIU8"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 42w3mJ1BXrz9s0n for ; Wed, 14 Nov 2018 23:32:30 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:content-type :content-transfer-encoding:mime-version; q=dns; s=default; b=o3R MtMxAK7J0ko0WT7mvzKNYs6OAdIFByol/T9CoQHY4zs3iiLcsYArI58b8EMVKnaP XrvhoixCKw+7WzhohBPUADYcakCrQ1UR+G/c3a5JBQybK1j7QqnUbbp1yU+1v22t +3YH9fw8RkhjlfMimgoPjwzc+F1P9KmxRsGI4tzs= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:content-type :content-transfer-encoding:mime-version; s=default; bh=388vzWjbb V0tZ6PNNXXNxmjp400=; b=s8/7FOpi3dhgemP0glyx4u2VYUn3PgRqlnO+vTpF7 2GDHQaHEDgjtc9f+x8ZF3zHAbNTaYA6kw6Sze2NKhoxcNbmGr6tS7f3f3ogl8e3A NeuGNoABtYnXUx5ruM0YUDIArq75Ky5cc8qANI7klD8nlP741+hljwvuuk752xbs BM= Received: (qmail 76957 invoked by alias); 14 Nov 2018 12:32:23 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 76940 invoked by uid 89); 14 Nov 2018 12:32:22 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-26.4 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_NUMSUBJECT, RCVD_IN_DNSWL_NONE, SPF_HELO_PASS, SPF_PASS autolearn=ham version=3.3.2 spammy=ds, fcvtzs, UD:aarch64.md, fe_invalid X-HELO: EUR02-AM5-obe.outbound.protection.outlook.com Received: from mail-eopbgr00063.outbound.protection.outlook.com (HELO EUR02-AM5-obe.outbound.protection.outlook.com) (40.107.0.63) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 14 Nov 2018 12:32:17 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector1-arm-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=1r8ckk9xqlSRyC14RPRH4Qv2Nf5VyBwMwAJx80QWq30=; b=k8iZuIU8cIZOOtN82/6QToJZheQoPVVK50GMhTfmep/dgJNtD5cSwywoLrIR3PR1/P+PS+AVFbskZcwls6+221ShGoHSIUiF8IpO3t+cmN6WXzijs6dS0QE5NeMFtdsR7uEVyqo8IdPfsPpTgDRZd1whf+CblezrFlfU24Tu7VA= Received: from DB5PR08MB1030.eurprd08.prod.outlook.com (10.166.14.15) by DB5PR08MB0917.eurprd08.prod.outlook.com (10.166.13.136) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1294.27; Wed, 14 Nov 2018 12:32:14 +0000 Received: from DB5PR08MB1030.eurprd08.prod.outlook.com ([fe80::f5c9:8ef6:9b28:8caa]) by DB5PR08MB1030.eurprd08.prod.outlook.com ([fe80::f5c9:8ef6:9b28:8caa%2]) with mapi id 15.20.1294.045; Wed, 14 Nov 2018 12:32:14 +0000 From: Wilco Dijkstra To: GCC Patches CC: nd Subject: [PATCH][AArch64] Fix PR81800 Date: Wed, 14 Nov 2018 12:32:14 +0000 Message-ID: authentication-results: spf=none (sender IP is ) smtp.mailfrom=Wilco.Dijkstra@arm.com; received-spf: None (protection.outlook.com: arm.com does not designate permitted sender hosts) MIME-Version: 1.0 PR81800 is about the lrint inline giving spurious FE_INEXACT exceptions. The previous change for PR81800 didn't fix this: when lrint is disabled in the backend, the midend will simply use llrint. This actually makes things worse since llrint now also ignores FE_INVALID exceptions! The fix is to disable lrint/llrint on double if the size of a long is smaller (ie. ilp32). Passes regress and bootstrap on AArch64. OK for commit? ChangeLog 2018-11-13 Wilco Dijkstra gcc/ PR target/81800 * gcc/config/aarch64/aarch64.md (lrint): Disable lrint pattern if GPF operand is larger than a long int. testsuite/ PR target/81800 * gcc.target/aarch64/no-inline-lrint_3.c: New test. diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 82af4d47f78c65880f5eec78add5a69110db7711..3c52e0c26f4f693e23f9fa27bf83986e6580984a 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -5972,7 +5972,7 @@ (define_expand "lrint2" [(match_operand:GPI 0 "register_operand") (match_operand:GPF 1 "register_operand")] "TARGET_FLOAT - && ((GET_MODE_SIZE (mode) <= GET_MODE_SIZE (mode)) + && ((GET_MODE_BITSIZE (mode) <= LONG_TYPE_SIZE) || !flag_trapping_math || flag_fp_int_builtin_inexact)" { rtx cvt = gen_reg_rtx (mode); diff --git a/gcc/testsuite/gcc.target/aarch64/no-inline-lrint_3.c b/gcc/testsuite/gcc.target/aarch64/no-inline-lrint_3.c new file mode 100644 index 0000000000000000000000000000000000000000..ca772cb999e7b6cfbd3f080111d3eb479d43f47b --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/no-inline-lrint_3.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target ilp32 } */ +/* { dg-options "-O3 -fno-math-errno -fno-fp-int-builtin-inexact" } */ + +#define TEST(name, float_type, int_type, fn) void f_##name (float_type x) \ +{ \ + volatile int_type b = __builtin_##fn (x); \ +} + +TEST (dld, double, long, lrint) +TEST (flf, float , long, lrintf) + +TEST (did, double, int, lrint) +TEST (fif, float , int, lrintf) + +/* { dg-final { scan-assembler-times "fcvtzs\tw\[0-9\]+, \[d,s\]\[0-9\]+" 2 } } */ +/* { dg-final { scan-assembler-times "bl\tlrint" 2 } } */