Message ID | D37C9241.FC7B%alan.hayward@arm.com |
---|---|
State | New |
Headers | show |
On Tue, 7 Jun 2016, Alan Hayward wrote: > testsuite/ > * gcc.dg/vect/vect-live-2.c : Likewise > * gcc.dg/vect/vect-live-slp-3.c : Update effective target > * lib/target-supports.exp : Add aarch64 to vect_long "Likewise" entries usually follow those they refer to (i.e., while ChangeLog files are "latest first", any individual entry is read "top-down"). And no space after the filename, and a full stop at the end of each entry starting with a "*". Gerald
On Tue, Jun 7, 2016 at 4:32 PM, Alan Hayward <alan.hayward@arm.com> wrote: > > > On 07/06/2016 10:28, "Rainer Orth" <ro@CeBiTec.Uni-Bielefeld.DE> wrote: > >>Alan Hayward <alan.hayward@arm.com> writes: >> >>> On 05/06/2016 12:00, "Andreas Schwab" <schwab@linux-m68k.org> wrote: >>> >>>>Alan Hayward <alan.hayward@arm.com> writes: >>>> >>>>> * gcc.dg/vect/vect-live-2.c: New test. >>>> >>>>This test fails on powerpc64 (with -m64, but not with -m32): >>>> >>>>$ grep 'vectorized.*loops' ./vect-live-2.c.149t.vect >>>>../gcc/testsuite/gcc.dg/vect/vect-live-2.c:10:1: note: vectorized 0 >>>>loops >>>>in function. >>>>../gcc/testsuite/gcc.dg/vect/vect-live-2.c:29:1: note: vectorized 0 >>>>loops >>>>in function. >>>> >>>> >>> >>> "note: not vectorized: relevant stmt not supported: _1 = (long unsigned >>> int) j_24;" >>> >>> >>> This is failing because power does not support vectorising a cast from >>>int >>> to long. >>> (It works on power 32bit because longs are 32bit and therefore no need >>>to >>> cast). >>> >>> Can someone please suggest a target-supports define (or another method) >>>I >>> can use to >>> disable this test for power 64bit (but not 32bit) ? >>> I tried using vect_multiple_sizes, but that will also disable the test >>>on >>> x86 without >>> avx. >> >>I'm also seeing new FAILs on Solaris/SPARC: >> >>+FAIL: gcc.dg/vect/vect-live-2.c -flto -ffat-lto-objects >>scan-tree-dump-times v >>ect "vectorized 1 loops" 1 >>+FAIL: gcc.dg/vect/vect-live-2.c scan-tree-dump-times vect "vectorized 1 >>loops" >>1 >> >>32- and 64-bit: >> >>vect-live-2.c:16:3: note: not vectorized: relevant stmt not supported: _2 >>= j.0_1 * 4; >>vect-live-2.c:48:7: note: not vectorized: control flow in loop. >>vect-live-2.c:35:3: note: not vectorized: loop contains function calls or >>data references that cannot be analyzed >> >>and >> >>+FAIL: gcc.dg/vect/vect-live-slp-3.c -flto -ffat-lto-objects >>scan-tree-dump-times vect "vec_stmt_relevant_p: stmt live but not >>relevant" 4 >>+FAIL: gcc.dg/vect/vect-live-slp-3.c -flto -ffat-lto-objects >>scan-tree-dump-times vect "vectorized 1 loops" 4 >>+FAIL: gcc.dg/vect/vect-live-slp-3.c -flto -ffat-lto-objects >>scan-tree-dump-times vect "vectorizing stmts using SLP" 4 >>+FAIL: gcc.dg/vect/vect-live-slp-3.c scan-tree-dump-times vect >>"vec_stmt_relevant_p: stmt live but not relevant" 4 >>+FAIL: gcc.dg/vect/vect-live-slp-3.c scan-tree-dump-times vect >>"vectorized 1 loops" 4 >>+FAIL: gcc.dg/vect/vect-live-slp-3.c scan-tree-dump-times vect >>"vectorizing stmts using SLP" 4 >> >>vect-live-slp-3.c:29:1: note: not vectorized: no vectype for stmt: n0_29 >>= *_4; >>vect-live-slp-3.c:30:1: note: not vectorized: no vectype for stmt: n0_29 >>= *_4; >>vect-live-slp-3.c:31:1: note: not vectorized: no vectype for stmt: n0_29 >>= *_4; >>vect-live-slp-3.c:32:1: note: not vectorized: no vectype for stmt: n0_29 >>= *_4; >>vect-live-slp-3.c:62:4: note: not vectorized: control flow in loop. >>vect-live-slp-3.c:45:3: note: not vectorized: loop contains function >>calls or data references that cannot be analyzed >> > > > I’ve been trying both these tests on x86,aarch64,power,sparc > > vect-live-slp-3.c > Fails on power 64 (altivec & vsx), sparc 64 (vis 2 & 3) > - due to long int unsupported > Pass on x86, aarch64, power 32 (altivec & vsx), sparc 32 (vis 2 & 3) > > vect-live-2.c > Fails on power 64 (altivec & vsx), sparc 64 (vis 2 & 3) > - due to long int unsupported > Fails on sparc 32 (vis 2) > - due to multiply/shift not supported > Pass on x86, aarch64, power 32 (altivec & vsx), sparc 32 (vis 3) > > > Therefore I think both tests should be gated on “vect_long”. > In addition, vect-live-2.c should also be gated on “vect_shift” > > “vect_long” is not currently enabled for aarch64, but should be. > > Also “vect_shift” is not currently enabled for sparc 32 (vis 3), but > probably > should be. I leave this for a task for a sparc maintainer to add (as I’m > unable to test). > > > > > This patch fixes the targets for vect-live-slp-3.c and vect-live-2.c. > It also adds aarch64 to vect_long. > > As a side consequence, the following vector tests are now enabled for > aarch64: > pr18425.c, pr30843.c, pr36493.c, pr42193.c and pr60656.c > > Tested on aarch64 and x86. > Tested by inspection on power and sparc > > Ok to commit? Ok. Thanks, Richard. > testsuite/ > * gcc.dg/vect/vect-live-2.c : Likewise > * gcc.dg/vect/vect-live-slp-3.c : Update effective target > * lib/target-supports.exp : Add aarch64 to vect_long > > > > > diff --git a/gcc/testsuite/gcc.dg/vect/vect-live-2.c > b/gcc/testsuite/gcc.dg/vect/vect-live-2.c > index > 53adc3fee006e0577a4cf2f9ba8fe091d2a09353..9460624a515945bdd72f98a0b1a6751fd > c7a75de 100644 > --- a/gcc/testsuite/gcc.dg/vect/vect-live-2.c > +++ b/gcc/testsuite/gcc.dg/vect/vect-live-2.c > @@ -1,4 +1,5 @@ > -/* { dg-require-effective-target vect_int } */ > +/* { dg-require-effective-target vect_long } */ > +/* { dg-require-effective-target vect_shift } */ > /* { dg-additional-options "-fno-tree-scev-cprop" } */ > > #include "tree-vect.h" > diff --git a/gcc/testsuite/gcc.dg/vect/vect-live-slp-3.c > b/gcc/testsuite/gcc.dg/vect/vect-live-slp-3.c > index > aacf5cb98071f6fec1f4b522eeefeb6696787334..70947afcc45d30987fc6df2db634d002d > 33b360f 100644 > --- a/gcc/testsuite/gcc.dg/vect/vect-live-slp-3.c > +++ b/gcc/testsuite/gcc.dg/vect/vect-live-slp-3.c > @@ -1,4 +1,4 @@ > -/* { dg-require-effective-target vect_int } */ > +/* { dg-require-effective-target vect_long } */ > /* { dg-additional-options "-fno-tree-scev-cprop" } */ > > #include "tree-vect.h" > diff --git a/gcc/testsuite/lib/target-supports.exp > b/gcc/testsuite/lib/target-supports.exp > index > f4cb276ed97eaf0f809b2c221f465747320d9a03..0b991a5c419c1cd7122543ffa04fbd433 > 4f7fdf5 100644 > --- a/gcc/testsuite/lib/target-supports.exp > +++ b/gcc/testsuite/lib/target-supports.exp > @@ -4124,7 +4124,8 @@ proc check_effective_target_vect_long { } { > && ![istarget powerpc-*-linux*paired*]) > && [check_effective_target_ilp32]) > || [check_effective_target_arm32] > - || ([istarget sparc*-*-*] && [check_effective_target_ilp32]) } { > + || ([istarget sparc*-*-*] && [check_effective_target_ilp32]) > + || [istarget aarch64*-*-*] } { > set answer 1 > } else { > set answer 0 > > > > > > > > > > > > > > > > >
diff --git a/gcc/testsuite/gcc.dg/vect/vect-live-2.c b/gcc/testsuite/gcc.dg/vect/vect-live-2.c index 53adc3fee006e0577a4cf2f9ba8fe091d2a09353..9460624a515945bdd72f98a0b1a6751fd c7a75de 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-live-2.c +++ b/gcc/testsuite/gcc.dg/vect/vect-live-2.c @@ -1,4 +1,5 @@ -/* { dg-require-effective-target vect_int } */ +/* { dg-require-effective-target vect_long } */ +/* { dg-require-effective-target vect_shift } */ /* { dg-additional-options "-fno-tree-scev-cprop" } */ #include "tree-vect.h" diff --git a/gcc/testsuite/gcc.dg/vect/vect-live-slp-3.c b/gcc/testsuite/gcc.dg/vect/vect-live-slp-3.c index aacf5cb98071f6fec1f4b522eeefeb6696787334..70947afcc45d30987fc6df2db634d002d 33b360f 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-live-slp-3.c +++ b/gcc/testsuite/gcc.dg/vect/vect-live-slp-3.c @@ -1,4 +1,4 @@ -/* { dg-require-effective-target vect_int } */ +/* { dg-require-effective-target vect_long } */ /* { dg-additional-options "-fno-tree-scev-cprop" } */ #include "tree-vect.h" diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index f4cb276ed97eaf0f809b2c221f465747320d9a03..0b991a5c419c1cd7122543ffa04fbd433 4f7fdf5 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -4124,7 +4124,8 @@ proc check_effective_target_vect_long { } { && ![istarget powerpc-*-linux*paired*]) && [check_effective_target_ilp32]) || [check_effective_target_arm32] - || ([istarget sparc*-*-*] && [check_effective_target_ilp32]) } { + || ([istarget sparc*-*-*] && [check_effective_target_ilp32]) + || [istarget aarch64*-*-*] } { set answer 1 } else { set answer 0