diff mbox

[X86_64] : Fix type attribute for sseimul reservations in znver1.md

Message ID CY1PR1201MB1098073085009BA79AAE24BE8FBD0@CY1PR1201MB1098.namprd12.prod.outlook.com
State New
Headers show

Commit Message

Kumar, Venkataramanan March 3, 2016, 6:05 p.m. UTC
Hi Maintainers,

The below patch corrects the type attribute  for "sseimul" type reservations in znver1.md.

(snip)
       (znver1_sseimul, znver1_sseimul_avx256, znver1_sseimul_load,
       znver1_sseimul_avx256_load,  znver1_sseimul_di,
       znver1_sseimul_load_di) : Fix the type attribute.

Ok for trunk if bootstrap and testing passes?

Regards,
Venkat.

Comments

Uros Bizjak March 3, 2016, 7:39 p.m. UTC | #1
On Thu, Mar 3, 2016 at 7:05 PM, Kumar, Venkataramanan
<Venkataramanan.Kumar@amd.com> wrote:
> Hi Maintainers,
>
> The below patch corrects the type attribute  for "sseimul" type reservations in znver1.md.
>
> (snip)
> diff --git a/gcc/config/i386/znver1.md b/gcc/config/i386/znver1.md
> index 3db3bed..feeccd7 100644
> --- a/gcc/config/i386/znver1.md
> +++ b/gcc/config/i386/znver1.md
> @@ -913,28 +913,28 @@
>  (define_insn_reservation "znver1_sseimul" 3
>                          (and (eq_attr "cpu" "znver1")
>                               (and (eq_attr "mode" "TI")
> -                                  (and (eq_attr "type" "ssemul")
> +                                  (and (eq_attr "type" "sseimul")
>                                         (eq_attr "memory" "none"))))
>                          "znver1-direct,znver1-fp0*3")
>
>  (define_insn_reservation "znver1_sseimul_avx256" 4
>                          (and (eq_attr "cpu" "znver1")
>                               (and (eq_attr "mode" "OI")
> -                                  (and (eq_attr "type" "ssemul")
> +                                  (and (eq_attr "type" "sseimul")
>                                         (eq_attr "memory" "none"))))
>                          "znver1-double,znver1-fp0*4")
>
>  (define_insn_reservation "znver1_sseimul_load" 7
>                          (and (eq_attr "cpu" "znver1")
>                               (and (eq_attr "mode" "TI")
> -                                  (and (eq_attr "type" "ssemul")
> +                                  (and (eq_attr "type" "sseimul")
>                                         (eq_attr "memory" "load"))))
>                          "znver1-direct,znver1-load,znver1-fp0*3")
>
>  (define_insn_reservation "znver1_sseimul_avx256_load" 8
>                          (and (eq_attr "cpu" "znver1")
>                               (and (eq_attr "mode" "OI")
> -                                  (and (eq_attr "type" "ssemul")
> +                                  (and (eq_attr "type" "sseimul")
>                                         (eq_attr "memory" "load"))))
>                          "znver1-double,znver1-load,znver1-fp0*4")
>
> @@ -942,13 +942,13 @@
>                          (and (eq_attr "cpu" "znver1")
>                               (and (eq_attr "mode" "DI")
>                                    (and (eq_attr "memory" "none")
> -                                       (eq_attr "type" "ssemul"))))
> +                                       (eq_attr "type" "sseimul"))))
>                          "znver1-direct,znver1-fp0*4")
> (Snip)
>
> Changelog
>
> 2016-03-03  Venkataramanan Kumar  <Venkataramanan.kumar@amd.com>
>
>        Fix sseimul type attribute.
>        * config/i386/znver1.md
>        (znver1_sseimul, znver1_sseimul_avx256, znver1_sseimul_load,
>        znver1_sseimul_avx256_load,  znver1_sseimul_di,
>        znver1_sseimul_load_di) : Fix the type attribute.
>
> Ok for trunk if bootstrap and testing passes?

OK.

BTW: This patch is trivial, according to [1]. The criteria is simply:

Obvious fixes can be committed without prior approval. Just check in
the fix and copy it to gcc-patches. A good test to determine whether a
fix is obvious: will the person who objects to my work the most be
able to find a fault with my fix? If the fix is later found to be
faulty, it can always be rolled back. We don't want to get overly
restrictive about checkin policies.

[1] https://gcc.gnu.org/svnwrite.html

Thanks,
Uros.
Kumar, Venkataramanan March 5, 2016, 12:39 p.m. UTC | #2
Hi Uros,

> -----Original Message-----

> From: Uros Bizjak [mailto:ubizjak@gmail.com]

> Sent: Friday, March 04, 2016 1:10 AM

> To: Kumar, Venkataramanan

> Cc: gcc-patches@gcc.gnu.org

> Subject: Re: [Patch X86_64] : Fix type attribute for sseimul reservations in

> znver1.md

> 

> On Thu, Mar 3, 2016 at 7:05 PM, Kumar, Venkataramanan

> <Venkataramanan.Kumar@amd.com> wrote:

> > Hi Maintainers,

> >

> > The below patch corrects the type attribute  for "sseimul" type

> reservations in znver1.md.

> >

> > (snip)

> > diff --git a/gcc/config/i386/znver1.md b/gcc/config/i386/znver1.md

> > index 3db3bed..feeccd7 100644

> > --- a/gcc/config/i386/znver1.md

> > +++ b/gcc/config/i386/znver1.md

> > @@ -913,28 +913,28 @@

> >  (define_insn_reservation "znver1_sseimul" 3

> >                          (and (eq_attr "cpu" "znver1")

> >                               (and (eq_attr "mode" "TI")

> > -                                  (and (eq_attr "type" "ssemul")

> > +                                  (and (eq_attr "type" "sseimul")

> >                                         (eq_attr "memory" "none"))))

> >                          "znver1-direct,znver1-fp0*3")

> >

> >  (define_insn_reservation "znver1_sseimul_avx256" 4

> >                          (and (eq_attr "cpu" "znver1")

> >                               (and (eq_attr "mode" "OI")

> > -                                  (and (eq_attr "type" "ssemul")

> > +                                  (and (eq_attr "type" "sseimul")

> >                                         (eq_attr "memory" "none"))))

> >                          "znver1-double,znver1-fp0*4")

> >

> >  (define_insn_reservation "znver1_sseimul_load" 7

> >                          (and (eq_attr "cpu" "znver1")

> >                               (and (eq_attr "mode" "TI")

> > -                                  (and (eq_attr "type" "ssemul")

> > +                                  (and (eq_attr "type" "sseimul")

> >                                         (eq_attr "memory" "load"))))

> >                          "znver1-direct,znver1-load,znver1-fp0*3")

> >

> >  (define_insn_reservation "znver1_sseimul_avx256_load" 8

> >                          (and (eq_attr "cpu" "znver1")

> >                               (and (eq_attr "mode" "OI")

> > -                                  (and (eq_attr "type" "ssemul")

> > +                                  (and (eq_attr "type" "sseimul")

> >                                         (eq_attr "memory" "load"))))

> >                          "znver1-double,znver1-load,znver1-fp0*4")

> >

> > @@ -942,13 +942,13 @@

> >                          (and (eq_attr "cpu" "znver1")

> >                               (and (eq_attr "mode" "DI")

> >                                    (and (eq_attr "memory" "none")

> > -                                       (eq_attr "type" "ssemul"))))

> > +                                       (eq_attr "type" "sseimul"))))

> >                          "znver1-direct,znver1-fp0*4")

> > (Snip)

> >

> > Changelog

> >

> > 2016-03-03  Venkataramanan Kumar

> <Venkataramanan.kumar@amd.com>

> >

> >        Fix sseimul type attribute.

> >        * config/i386/znver1.md

> >        (znver1_sseimul, znver1_sseimul_avx256, znver1_sseimul_load,

> >        znver1_sseimul_avx256_load,  znver1_sseimul_di,

> >        znver1_sseimul_load_di) : Fix the type attribute.

> >

> > Ok for trunk if bootstrap and testing passes?

> 

> OK.

> 

> BTW: This patch is trivial, according to [1]. The criteria is simply:

> 

> Obvious fixes can be committed without prior approval. Just check in

> the fix and copy it to gcc-patches. A good test to determine whether a

> fix is obvious: will the person who objects to my work the most be

> able to find a fault with my fix? If the fix is later found to be

> faulty, it can always be rolled back. We don't want to get overly

> restrictive about checkin policies.

> 

> [1] https://gcc.gnu.org/svnwrite.html

> 


Thank you I up-streamed in trunk. 
One small change I also did  is reduced the latency by 1 for DI mode in those pattern. 
https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=234007

regards,
Venkat.

> Thanks,

> Uros.
diff mbox

Patch

diff --git a/gcc/config/i386/znver1.md b/gcc/config/i386/znver1.md
index 3db3bed..feeccd7 100644
--- a/gcc/config/i386/znver1.md
+++ b/gcc/config/i386/znver1.md
@@ -913,28 +913,28 @@ 
 (define_insn_reservation "znver1_sseimul" 3
                         (and (eq_attr "cpu" "znver1")
                              (and (eq_attr "mode" "TI")
-                                  (and (eq_attr "type" "ssemul")
+                                  (and (eq_attr "type" "sseimul")
                                        (eq_attr "memory" "none"))))
                         "znver1-direct,znver1-fp0*3")

 (define_insn_reservation "znver1_sseimul_avx256" 4
                         (and (eq_attr "cpu" "znver1")
                              (and (eq_attr "mode" "OI")
-                                  (and (eq_attr "type" "ssemul")
+                                  (and (eq_attr "type" "sseimul")
                                        (eq_attr "memory" "none"))))
                         "znver1-double,znver1-fp0*4")

 (define_insn_reservation "znver1_sseimul_load" 7
                         (and (eq_attr "cpu" "znver1")
                              (and (eq_attr "mode" "TI")
-                                  (and (eq_attr "type" "ssemul")
+                                  (and (eq_attr "type" "sseimul")
                                        (eq_attr "memory" "load"))))
                         "znver1-direct,znver1-load,znver1-fp0*3")

 (define_insn_reservation "znver1_sseimul_avx256_load" 8
                         (and (eq_attr "cpu" "znver1")
                              (and (eq_attr "mode" "OI")
-                                  (and (eq_attr "type" "ssemul")
+                                  (and (eq_attr "type" "sseimul")
                                        (eq_attr "memory" "load"))))
                         "znver1-double,znver1-load,znver1-fp0*4")

@@ -942,13 +942,13 @@ 
                         (and (eq_attr "cpu" "znver1")
                              (and (eq_attr "mode" "DI")
                                   (and (eq_attr "memory" "none")
-                                       (eq_attr "type" "ssemul"))))
+                                       (eq_attr "type" "sseimul"))))
                         "znver1-direct,znver1-fp0*4")
(Snip)

Changelog 

2016-03-03  Venkataramanan Kumar  <Venkataramanan.kumar@amd.com>

       Fix sseimul type attribute.
       * config/i386/znver1.md