From patchwork Mon Dec 7 14:53:13 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Chen Gang X-Patchwork-Id: 553420 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 1FF4E140273 for ; Tue, 8 Dec 2015 01:53:23 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=tjCHtATH; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:content-type:from:to:cc:subject:date:mime-version; q=dns; s=default; b=vstZXdak4WdNXgAjnPlVFLwO6oR4WhAdAU8X78+NON0 +QmXUQIrQ9x6S525H6WqplborNONAMPcu7FK2D//U57UGVL2opemlMKhWWh2+OZp VAVrvXsCoCVA68ESlCqBUz5EV8IEV9GVsoNXJLwn0DcsuQwFco56i4fIWxdepPlc = DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:content-type:from:to:cc:subject:date:mime-version; s=default; bh=O/kPfjxvZ+mrI24c20BnLs0PTss=; b=tjCHtATHCElVk45im 5/WiRRc3PFwkMMTbaSj4If5aswNdh/7adDRAK48TCQXBCMyTmbEdXRqmEHzrtUY7 TVncbR8ZT5h6vS6NIbouyvrJ1xyPCKQ3dY2Jg10mpQbeqgIiUWJkIVcTukZSRxMe xV2nRlKX2a9v2nYLXEqTTAZB10= Received: (qmail 41980 invoked by alias); 7 Dec 2015 14:53:17 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 41939 invoked by uid 89); 7 Dec 2015 14:53:16 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=4.1 required=5.0 tests=AWL, BAYES_50, FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM, FREEMAIL_REPLY, MEDICAL_SUBJECT, RCVD_IN_DNSWL_LOW, SPF_PASS, T_RP_MATCHES_RCVD autolearn=no version=3.3.2 X-HELO: COL004-OMC2S17.hotmail.com Received: from col004-omc2s17.hotmail.com (HELO COL004-OMC2S17.hotmail.com) (65.55.34.91) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-SHA256 encrypted) ESMTPS; Mon, 07 Dec 2015 14:53:15 +0000 Received: from COL130-W3 ([65.55.34.73]) by COL004-OMC2S17.hotmail.com over TLS secured channel with Microsoft SMTPSVC(7.5.7601.23008); Mon, 7 Dec 2015 06:53:13 -0800 X-TMN: [CvTd4D7swsBSRd8u1uWmO+Oe82QwG8J9] Message-ID: From: Chen Gang To: "walt@tilera.com" , Jeff Law CC: "rth@twiddle.net" , Peter Maydell , gcc-patches List , Mike Stump , Chris Metcalf Subject: [PATCH] gcc/config/tilegx/tilegx.md: Compare only 32-bit values for 32-bit comparing Date: Mon, 7 Dec 2015 22:53:13 +0800 MIME-Version: 1.0 From 358ae2453a4b965adaf9e684220b7461f719a568 Mon Sep 17 00:00:00 2001 From: Chen Gang Date: Mon, 7 Dec 2015 21:29:20 +0800 Subject: [PATCH] gcc/config/tilegx/tilegx.md: Compare only 32-bit values for 32-bit comparing For __buildin_mul_overflow(), it will really compare only 32-bit values for 32-bit comparing. If compare 64-bit values instead of, it will cause logical issue. This fix will have low performance for 32-bit comparing (it has more instructions, also without boundling), but it is correct and fix the related issue. 2015-12-07  Chen Gang   ---  gcc/config/tilegx/tilegx.md | 34 ++++++++++++++++++++++++++--------  1 file changed, 26 insertions(+), 8 deletions(-) --  1.9.3 diff --git a/gcc/config/tilegx/tilegx.md b/gcc/config/tilegx/tilegx.md index 944953c..b694dbd 100644 --- a/gcc/config/tilegx/tilegx.md +++ b/gcc/config/tilegx/tilegx.md @@ -1650,22 +1650,40 @@  })      -(define_insn "insn_cmpne_" -  [(set (match_operand:I48MODE2 0 "register_operand" "=r") - (ne:I48MODE2 (match_operand:I48MODE 1 "reg_or_0_operand" "rO") -     (match_operand:I48MODE 2 "reg_or_cint_operand" "rO")))] +(define_insn "insn_cmpne_di" +  [(set (match_operand:I48MODE 0 "register_operand" "=r") + (ne:I48MODE (match_operand:DI 1 "reg_or_0_operand" "rO") +     (match_operand:DI 2 "reg_or_cint_operand" "rO")))]    ""    "cmpne\t%0, %r1, %r2")    -(define_insn "insn_cmpeq_" -  [(set (match_operand:I48MODE2 0 "register_operand" "=r,r") - (eq:I48MODE2 (match_operand:I48MODE 1 "reg_or_0_operand" "%rO,rO") -     (match_operand:I48MODE 2 "reg_or_cint_operand" "I,rO")))] +(define_insn "insn_cmpne_si" +  [(set (match_operand:I48MODE 0 "register_operand" "=r") + (ne:I48MODE (match_operand:SI 1 "reg_or_0_operand" "rO") +     (match_operand:SI 2 "reg_or_cint_operand" "rO")))] +  "" +  "xor\t%0, %r1, %r2; bfextu\t%0, %0, 0, 31; cmpne\t%0, %0, zero" +  [(set_attr "type" "cannot_bundle")]) + +(define_insn "insn_cmpeq_di" +  [(set (match_operand:I48MODE 0 "register_operand" "=r,r") + (eq:I48MODE (match_operand:DI 1 "reg_or_0_operand" "rO,rO") +     (match_operand:DI 2 "reg_or_cint_operand" "I,rO")))]    ""    "@     cmpeqi\t%0, %r1, %2     cmpeq\t%0, %r1, %r2")   +(define_insn "insn_cmpeq_si" +  [(set (match_operand:I48MODE 0 "register_operand" "=r,r") + (eq:I48MODE (match_operand:SI 1 "reg_or_0_operand" "rO,rO") +     (match_operand:SI 2 "reg_or_cint_operand" "I,rO")))] +  "" +  "@ +   xori\t%0, %r1, %2; bfextu\t%0, %0, 0, 31; cmpeqi\t%0, %0, 0 +   xor\t%0, %r1, %r2; bfextu\t%0, %0, 0, 31; cmpeqi\t%0, %0, 0" +  [(set_attr "type" "cannot_bundle")]) +  (define_insn "insn_cmplts_"    [(set (match_operand:I48MODE2 0 "register_operand" "=r,r")   (lt:I48MODE2 (match_operand:I48MODE 1 "reg_or_0_operand" "rO,rO")