From patchwork Mon Mar 6 05:09:44 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Hurugalawadi, Naveen" X-Patchwork-Id: 735529 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3vc7Gw3Hp0z9s2P for ; Mon, 6 Mar 2017 16:13:28 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="UwTnCxXN"; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:content-type:mime-version; q=dns; s=default; b=wJtFGWqnNbmo2u+CiE7ThkgimSLjn2NnE8xvXsLA5HbF9RwEyN +tKv0oCmJZwa8XjEM9oZ18ocexpXSMKyc5D1PWeNe4zcnrfsoVBzzGsV7LyHLNll rgOdrXCIijFq15M29v9iuVZ++qZWRSM5BqjMk+YI59SR235LQUSQBfGgg= DKIM-Signature: v=1; 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Mon, 06 Mar 2017 05:10:30 +0000 Received: from CO2PR07MB2694.namprd07.prod.outlook.com (10.166.214.7) by CO2PR07MB2614.namprd07.prod.outlook.com (10.166.213.137) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id 15.1.947.12; Mon, 6 Mar 2017 05:09:45 +0000 Received: from CO2PR07MB2694.namprd07.prod.outlook.com ([10.166.214.7]) by CO2PR07MB2694.namprd07.prod.outlook.com ([10.166.214.7]) with mapi id 15.01.0947.018; Mon, 6 Mar 2017 05:09:44 +0000 From: "Hurugalawadi, Naveen" To: "gcc-patches@gcc.gnu.org" CC: "Pinski, Andrew" , James Greenhalgh , Marcus Shawcroft , Richard Earnshaw Subject: [PATCH][AArch64] Add neon_pairwise_add & neon_pairwise_add_q types Date: Mon, 6 Mar 2017 05:09:44 +0000 Message-ID: authentication-results: cavium.com; dkim=none (message not signed) header.d=none; cavium.com; dmarc=none action=none header.from=cavium.com; x-microsoft-exchange-diagnostics: 1; CO2PR07MB2614; 7:0G6lCoaLDLTZ7PmbkRbvLVj2X3exDcJ8rxuF6wiC2mbbzvBtct6xtKTO5QPVaxHYNUYtDmu5BFZdBCnYls/sjA+1/CGxI7O+b6n9sATSVy3nNGX/U439omnRxXCJ72jxtdh2Tx1jQa5qe6BVARd/vNSg6z+fqSXdRXd7sEXqOwf0IsIq5WbliaNRIYxTRSV/CqDNsf6FEvBhORFWOzeRvps75nGz4yFfbQq2w8tkwfEuhsVKRu1sKeO8OIwGGbDZHomTUFbb6GT8F7AhdYvvvnxKlQKdMAn87rHk9P2aGlZTZD4ZbOSraF2sr951+A8253VgGKfLFc5Hap74Akrg5Q== x-forefront-antispam-report: SFV:SKI; SCL:-1SFV:NSPM; SFS:(10009020)(6009001)(7916002)(39450400003)(377424004)(9686003)(55016002)(99286003)(5640700003)(8676002)(25786008)(6436002)(66066001)(6506006)(54906002)(81166006)(92566002)(305945005)(74316002)(7736002)(5660300001)(7696004)(6116002)(102836003)(3846002)(86362001)(99936001)(33656002)(122556002)(4326008)(189998001)(3280700002)(77096006)(2900100001)(2501003)(5890100001)(6916009)(8936002)(2351001)(2906002)(3660700001)(53936002)(110136004)(38730400002)(54356999)(50986999); DIR:OUT; SFP:1101; SCL:1; SRVR:CO2PR07MB2614; H:CO2PR07MB2694.namprd07.prod.outlook.com; FPR:; SPF:None; MLV:sfv; LANG:en; x-ms-office365-filtering-correlation-id: a1385fb2-cdf6-4ffa-6681-08d4644f00f7 x-microsoft-antispam: UriScan:; BCL:0; PCL:0; RULEID:(22001); SRVR:CO2PR07MB2614; x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:; x-exchange-antispam-report-cfa-test: BCL:0; PCL:0; RULEID:(102415395)(6040375)(601004)(2401047)(8121501046)(5005006)(3002001)(10201501046)(6041248)(20161123562025)(20161123555025)(20161123560025)(20161123558025)(20161123564025)(6072148); SRVR:CO2PR07MB2614; BCL:0; PCL:0; RULEID:; SRVR:CO2PR07MB2614; x-forefront-prvs: 0238AEEDB0 spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: cavium.com X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Mar 2017 05:09:44.5538 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 711e4ccf-2e9b-4bcf-a551-4094005b6194 X-MS-Exchange-Transport-CrossTenantHeadersStamped: CO2PR07MB2614 Hi, Please find attached the patch that adds "neon_pairwise_add" & "neon_pairwise_add_qcrypto_pmull" for AArch64. The patch doesn't change spec but improve other benchmarks. Bootstrapped and Regression tested on aarch64-thunder-linux. Please review the patch and let us know if its okay for Stage-1? Thanks, Naveen 2017-03-06 Julian Brown Naveen H.S * config/aarch64/aarch64-simd.md (aarch64_reduc_plus_internal) (aarch64_reduc_plus_internalv2si, aarch64_addp, aarch64_addpdi): Use neon_pairwise_add/neon_pairwise_add_q as appropriate. * config/aarch64/iterators.md (reduc_pairwise): New mode attribute. * config/aarch64/thunderx.md (thunderx_neon_add, thunderx_neon_add_q): Tweak for neon_pairwise_add split. * config/aarch64/thunderx2t99.md (thunderx2t99_asimd_int): Add neon_pairwise_add/neon_pairwise_add_q types. * config/arm/cortex-a15-neon.md (cortex_a15_neon_type): Likewise. * config/arm/cortex-a17-neon.md (cortex_a17_neon_type): Likewise. * config/arm/cortex-a57.md (cortex_a57_neon_type): Likewise. * config/arm/cortex-a8-neon.md (cortex_a8_neon_type): Likewise. * config/arm/cortex-a9-neon.md (cortex_a9_neon_type): Likewise. * config/arm/xgene1.md (xgene1_neon_arith): Likewise. * config/arm/types.md (neon_pairwise_add, neon_pairwise_add_q): Add. diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md index 338b9f8..878f86a 100644 --- a/gcc/config/aarch64/aarch64-simd.md +++ b/gcc/config/aarch64/aarch64-simd.md @@ -2101,7 +2101,7 @@ UNSPEC_ADDV))] "TARGET_SIMD" "add\\t%0, %1." - [(set_attr "type" "neon_reduc_add")] + [(set_attr "type" "neon__add")] ) (define_insn "aarch64_reduc_plus_internalv2si" @@ -2110,7 +2110,7 @@ UNSPEC_ADDV))] "TARGET_SIMD" "addp\\t%0.2s, %1.2s, %1.2s" - [(set_attr "type" "neon_reduc_add")] + [(set_attr "type" "neon_pairwise_add")] ) (define_insn "reduc_plus_scal_" @@ -4405,7 +4405,7 @@ UNSPEC_ADDP))] "TARGET_SIMD" "addp\t%0, %1, %2" - [(set_attr "type" "neon_reduc_add")] + [(set_attr "type" "neon_pairwise_add")] ) (define_insn "aarch64_addpdi" @@ -4415,7 +4415,7 @@ UNSPEC_ADDP))] "TARGET_SIMD" "addp\t%d0, %1.2d" - [(set_attr "type" "neon_reduc_add")] + [(set_attr "type" "neon_pairwise_add")] ) ;; sqrt diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md index c59d31e..c829cb5 100644 --- a/gcc/config/aarch64/iterators.md +++ b/gcc/config/aarch64/iterators.md @@ -790,6 +790,12 @@ (V2SF "p") (V4SF "v") (V4HF "v") (V8HF "v")]) +(define_mode_attr reduc_pairwise [(V8QI "reduc") (V16QI "reduc") + (V4HI "reduc") (V8HI "reduc") + (V2SI "pairwise") (V4SI "reduc") + (V2DI "pairwise") (V2DF "pairwise") + (V2SF "pairwise") (V4SF "reduc")]) + (define_mode_attr vsi2qi [(V2SI "v8qi") (V4SI "v16qi")]) (define_mode_attr VSI2QI [(V2SI "V8QI") (V4SI "V16QI")]) diff --git a/gcc/config/aarch64/thunderx.md b/gcc/config/aarch64/thunderx.md index b67671d..95bfad4 100644 --- a/gcc/config/aarch64/thunderx.md +++ b/gcc/config/aarch64/thunderx.md @@ -266,7 +266,8 @@ (define_insn_reservation "thunderx_neon_add" 4 (and (eq_attr "tune" "thunderx") - (eq_attr "type" "neon_reduc_add, neon_reduc_minmax, neon_fp_reduc_add_s, \ + (eq_attr "type" "neon_reduc_add, neon_pairwise_add, neon_reduc_minmax,\ + neon_fp_reduc_add_s, \ neon_fp_reduc_add_d, neon_fp_to_int_s, neon_fp_to_int_d, \ neon_add_halve, neon_sub_halve, neon_qadd, neon_compare, \ neon_compare_zero, neon_minmax, neon_abd, neon_add, neon_sub, \ @@ -280,7 +281,8 @@ (define_insn_reservation "thunderx_neon_add_q" 5 (and (eq_attr "tune" "thunderx") - (eq_attr "type" "neon_reduc_add_q, neon_reduc_minmax_q, neon_fp_reduc_add_s_q, \ + (eq_attr "type" "neon_reduc_add_q, neon_pairwise_add_q,\ + neon_reduc_minmax_q, neon_fp_reduc_add_s_q, \ neon_fp_reduc_add_d_q, neon_fp_to_int_s_q, neon_fp_to_int_d_q, \ neon_add_halve_q, neon_sub_halve_q, neon_qadd_q, neon_compare_q, \ neon_compare_zero_q, neon_minmax_q, neon_abd_q, neon_add_q, neon_sub_q, \ diff --git a/gcc/config/aarch64/thunderx2t99.md b/gcc/config/aarch64/thunderx2t99.md index 67011ac..f807547 100644 --- a/gcc/config/aarch64/thunderx2t99.md +++ b/gcc/config/aarch64/thunderx2t99.md @@ -231,6 +231,7 @@ neon_abs,neon_abs_q,\ neon_add,neon_add_q,\ neon_neg,neon_neg_q,\ + neon_pairwise_add,neon_pairwise_add_q,\ neon_add_long,neon_add_widen,\ neon_add_halve,neon_add_halve_q,\ neon_sub_long,neon_sub_widen,\ diff --git a/gcc/config/arm/cortex-a15-neon.md b/gcc/config/arm/cortex-a15-neon.md index 73ee84c..1a02fa2 100644 --- a/gcc/config/arm/cortex-a15-neon.md +++ b/gcc/config/arm/cortex-a15-neon.md @@ -48,6 +48,7 @@ (eq_attr "type" "neon_add, neon_add_q, neon_add_long,\ neon_add_widen, neon_neg, neon_neg_q,\ neon_reduc_add, neon_reduc_add_q,\ + neon_pairwise_add, neon_pairwise_add_q,\ neon_reduc_add_long, neon_sub, neon_sub_q,\ neon_sub_long, neon_sub_widen, neon_logic,\ neon_logic_q, neon_tst, neon_tst_q") diff --git a/gcc/config/arm/cortex-a17-neon.md b/gcc/config/arm/cortex-a17-neon.md index 29d08de..d4f9e03 100644 --- a/gcc/config/arm/cortex-a17-neon.md +++ b/gcc/config/arm/cortex-a17-neon.md @@ -47,6 +47,7 @@ (eq_attr "type" "neon_add, neon_add_q, neon_add_long,\ neon_add_widen, neon_neg, neon_neg_q,\ neon_reduc_add, neon_reduc_add_q,\ + neon_pairwise_add, neon_pairwise_add_q,\ neon_reduc_add_long, neon_sub, neon_sub_q,\ neon_sub_long, neon_sub_widen, neon_logic,\ neon_logic_q, neon_tst, neon_tst_q") diff --git a/gcc/config/arm/cortex-a57.md b/gcc/config/arm/cortex-a57.md index ebf4a49..cb5e181 100644 --- a/gcc/config/arm/cortex-a57.md +++ b/gcc/config/arm/cortex-a57.md @@ -50,6 +50,7 @@ (eq_attr "type" "neon_add, neon_add_q, neon_add_long,\ neon_add_widen, neon_neg, neon_neg_q,\ neon_reduc_add, neon_reduc_add_q,\ + neon_pairwise_add, neon_pairwise_add_q,\ neon_reduc_add_long, neon_sub, neon_sub_q,\ neon_sub_long, neon_sub_widen, neon_logic,\ neon_logic_q, neon_tst, neon_tst_q") diff --git a/gcc/config/arm/cortex-a8-neon.md b/gcc/config/arm/cortex-a8-neon.md index baa9180..652ba4e 100644 --- a/gcc/config/arm/cortex-a8-neon.md +++ b/gcc/config/arm/cortex-a8-neon.md @@ -51,6 +51,7 @@ (const_string "neon_int_2") (eq_attr "type" "neon_neg, neon_neg_q,\ neon_reduc_add, neon_reduc_add_q,\ + neon_pairwise_add, neon_pairwise_add_q,\ neon_reduc_add_long,\ neon_add_long, neon_sub_long") (const_string "neon_int_3") diff --git a/gcc/config/arm/cortex-a9-neon.md b/gcc/config/arm/cortex-a9-neon.md index 9e9827f..bb1e300 100644 --- a/gcc/config/arm/cortex-a9-neon.md +++ b/gcc/config/arm/cortex-a9-neon.md @@ -52,6 +52,7 @@ (const_string "neon_int_2") (eq_attr "type" "neon_neg, neon_neg_q,\ neon_reduc_add, neon_reduc_add_q,\ + neon_pairwise_add, neon_pairwise_add_q,\ neon_reduc_add_long,\ neon_add_long, neon_sub_long") (const_string "neon_int_3") diff --git a/gcc/config/arm/types.md b/gcc/config/arm/types.md index 253f496..ce1b6bc 100644 --- a/gcc/config/arm/types.md +++ b/gcc/config/arm/types.md @@ -274,6 +274,8 @@ ; neon_reduc_add_long ; neon_reduc_add_acc ; neon_reduc_add_acc_q +; neon_pairwise_add +; neon_pairwise_add_q ; neon_reduc_minmax ; neon_reduc_minmax_q ; neon_logic @@ -788,6 +790,8 @@ neon_reduc_add_long,\ neon_reduc_add_acc,\ neon_reduc_add_acc_q,\ + neon_pairwise_add,\ + neon_pairwise_add_q,\ neon_reduc_minmax,\ neon_reduc_minmax_q,\ neon_logic,\ @@ -1116,6 +1120,7 @@ neon_compare_q, neon_compare_zero, neon_compare_zero_q,\ neon_arith_acc, neon_arith_acc_q, neon_reduc_add,\ neon_reduc_add_q, neon_reduc_add_long, neon_reduc_add_acc,\ + neon_pairwise_add, neon_pairwise_add_q,\ neon_reduc_add_acc_q, neon_reduc_minmax, neon_reduc_minmax_q,\ neon_logic, neon_logic_q, neon_tst, neon_tst_q,\ neon_shift_imm, neon_shift_imm_q, neon_shift_imm_narrow_q,\ diff --git a/gcc/config/arm/xgene1.md b/gcc/config/arm/xgene1.md index 34a13f4..1f68305 100644 --- a/gcc/config/arm/xgene1.md +++ b/gcc/config/arm/xgene1.md @@ -288,6 +288,8 @@ neon_arith_acc_q,\ neon_reduc_add,\ neon_reduc_add_q,\ + neon_pairwise_add,\ + neon_pairwise_add_q,\ neon_add_halve,\ neon_add_halve_q,\ neon_sub_halve,\