diff mbox

[AArch64] Fix PR78382

Message ID CO2PR07MB2694E37A5097A392880906CB83850@CO2PR07MB2694.namprd07.prod.outlook.com
State New
Headers show

Commit Message

Hurugalawadi, Naveen Dec. 7, 2016, 7:25 a.m. UTC 
Hi James,

Thanks for the review and suggestions regarding the testcase.

>> Why limit the ABI and endianness here

Extra options have been dropped and the testcase will check across
all variants and endianness.

Please find attached the modified patch as per the comments and let
me know if its okay?

Thanks,
Naveen

Comments

James Greenhalgh Dec. 7, 2016, 11:09 a.m. UTC | #1 
On Wed, Dec 07, 2016 at 07:25:29AM +0000, Hurugalawadi, Naveen wrote:
> Hi James,
> 
> Thanks for the review and suggestions regarding the testcase.
> 
> >> Why limit the ABI and endianness here
> 
> Extra options have been dropped and the testcase will check across
> all variants and endianness.
> 
> Please find attached the modified patch as per the comments and let
> me know if its okay?

OK with an appropriate ChangeLog entry.

Thanks,
James

> diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
> index dab46b5..2b61897 100644
> --- a/gcc/config/aarch64/aarch64.c
> +++ b/gcc/config/aarch64/aarch64.c
> @@ -1378,10 +1378,14 @@ aarch64_load_symref_appropriately (rtx dest, rtx imm,
>      case SYMBOL_SMALL_TLSGD:
>        {
>  	rtx_insn *insns;
> -	rtx result = gen_rtx_REG (Pmode, R0_REGNUM);
> +	machine_mode mode = GET_MODE (dest);
> +	rtx result = gen_rtx_REG (mode, R0_REGNUM);
>  
>  	start_sequence ();
> -	aarch64_emit_call_insn (gen_tlsgd_small (result, imm));
> +	if (TARGET_ILP32)
> +	  aarch64_emit_call_insn (gen_tlsgd_small_si (result, imm));
> +	else
> +	  aarch64_emit_call_insn (gen_tlsgd_small_di (result, imm));
>  	insns = get_insns ();
>  	end_sequence ();
>  
> diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
> index 1e6b6f5..9d89ee8 100644
> --- a/gcc/config/aarch64/aarch64.md
> +++ b/gcc/config/aarch64/aarch64.md
> @@ -5173,20 +5173,20 @@
>  ;; The TLS ABI specifically requires that the compiler does not schedule
>  ;; instructions in the TLS stubs, in order to enable linker relaxation.
>  ;; Therefore we treat the stubs as an atomic sequence.
> -(define_expand "tlsgd_small"
> +(define_expand "tlsgd_small_<mode>"
>   [(parallel [(set (match_operand 0 "register_operand" "")
>                    (call (mem:DI (match_dup 2)) (const_int 1)))
> -	     (unspec:DI [(match_operand:DI 1 "aarch64_valid_symref" "")] UNSPEC_GOTSMALLTLS)
> +	     (unspec:DI [(match_operand:PTR 1 "aarch64_valid_symref" "")] UNSPEC_GOTSMALLTLS)
>  	     (clobber (reg:DI LR_REGNUM))])]
>   ""
>  {
>    operands[2] = aarch64_tls_get_addr ();
>  })
>  
> -(define_insn "*tlsgd_small"
> +(define_insn "*tlsgd_small_<mode>"
>    [(set (match_operand 0 "register_operand" "")
>  	(call (mem:DI (match_operand:DI 2 "" "")) (const_int 1)))
> -   (unspec:DI [(match_operand:DI 1 "aarch64_valid_symref" "S")] UNSPEC_GOTSMALLTLS)
> +   (unspec:DI [(match_operand:PTR 1 "aarch64_valid_symref" "S")] UNSPEC_GOTSMALLTLS)
>     (clobber (reg:DI LR_REGNUM))
>    ]
>    ""
> diff --git a/gcc/testsuite/gcc.target/aarch64/pr78382.c b/gcc/testsuite/gcc.target/aarch64/pr78382.c
> new file mode 100644
> index 0000000..febe7bc
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/pr78382.c
> @@ -0,0 +1,10 @@
> +/* { dg-require-effective-target fpic } */
> +/* { dg-options "-mtls-dialect=trad -fpic" } */
> +
> +__thread int abc;
> +void
> +foo ()
> +{
> +  int *p;
> +  p = &abc;
> +}
diff mbox

Patch

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index dab46b5..2b61897 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -1378,10 +1378,14 @@  aarch64_load_symref_appropriately (rtx dest, rtx imm,
     case SYMBOL_SMALL_TLSGD:
       {
 	rtx_insn *insns;
-	rtx result = gen_rtx_REG (Pmode, R0_REGNUM);
+	machine_mode mode = GET_MODE (dest);
+	rtx result = gen_rtx_REG (mode, R0_REGNUM);
 
 	start_sequence ();
-	aarch64_emit_call_insn (gen_tlsgd_small (result, imm));
+	if (TARGET_ILP32)
+	  aarch64_emit_call_insn (gen_tlsgd_small_si (result, imm));
+	else
+	  aarch64_emit_call_insn (gen_tlsgd_small_di (result, imm));
 	insns = get_insns ();
 	end_sequence ();
 
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 1e6b6f5..9d89ee8 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -5173,20 +5173,20 @@ 
 ;; The TLS ABI specifically requires that the compiler does not schedule
 ;; instructions in the TLS stubs, in order to enable linker relaxation.
 ;; Therefore we treat the stubs as an atomic sequence.
-(define_expand "tlsgd_small"
+(define_expand "tlsgd_small_<mode>"
  [(parallel [(set (match_operand 0 "register_operand" "")
                   (call (mem:DI (match_dup 2)) (const_int 1)))
-	     (unspec:DI [(match_operand:DI 1 "aarch64_valid_symref" "")] UNSPEC_GOTSMALLTLS)
+	     (unspec:DI [(match_operand:PTR 1 "aarch64_valid_symref" "")] UNSPEC_GOTSMALLTLS)
 	     (clobber (reg:DI LR_REGNUM))])]
  ""
 {
   operands[2] = aarch64_tls_get_addr ();
 })
 
-(define_insn "*tlsgd_small"
+(define_insn "*tlsgd_small_<mode>"
   [(set (match_operand 0 "register_operand" "")
 	(call (mem:DI (match_operand:DI 2 "" "")) (const_int 1)))
-   (unspec:DI [(match_operand:DI 1 "aarch64_valid_symref" "S")] UNSPEC_GOTSMALLTLS)
+   (unspec:DI [(match_operand:PTR 1 "aarch64_valid_symref" "S")] UNSPEC_GOTSMALLTLS)
    (clobber (reg:DI LR_REGNUM))
   ]
   ""
diff --git a/gcc/testsuite/gcc.target/aarch64/pr78382.c b/gcc/testsuite/gcc.target/aarch64/pr78382.c
new file mode 100644
index 0000000..febe7bc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/pr78382.c
@@ -0,0 +1,10 @@ 
+/* { dg-require-effective-target fpic } */
+/* { dg-options "-mtls-dialect=trad -fpic" } */
+
+__thread int abc;
+void
+foo ()
+{
+  int *p;
+  p = &abc;
+}