| Message ID | CO2PR07MB26946376EB24A0EB2BB66C6583110@CO2PR07MB2694.namprd07.prod.outlook.com |
|---|---|
| State | New |
| Headers | show |
On 04/26/2017 06:50 AM, Hurugalawadi, Naveen wrote: > Hi Wilco, > > Thanks for reviewing the patch. > >>> The return false seems incorrect - it means a core can either have >>> FUSE_CMP_BRANCH or FUSE_ALU_BRANCH but not both. > Thanks for pointing out about the confusion. > Modified the code as required. > > Bootstrapped and Regression tested on AArch64 and X86_64. > Please review the patch and let us know if its okay? > > Thanks, > Naveen > > > fusion-anycond-jump-1.patch > > > diff --git a/gcc/sched-deps.c b/gcc/sched-deps.c > index b2393bf..b15a865 100644 > --- a/gcc/sched-deps.c > +++ b/gcc/sched-deps.c > @@ -2835,33 +2835,16 @@ sched_macro_fuse_insns (rtx_insn *insn) > { > rtx_insn *prev; > > - if (any_condjump_p (insn)) > - { > - unsigned int condreg1, condreg2; > - rtx cc_reg_1; > - targetm.fixed_condition_code_regs (&condreg1, &condreg2); > - cc_reg_1 = gen_rtx_REG (CCmode, condreg1); > - prev = prev_nonnote_nondebug_insn (insn); > - if (!reg_referenced_p (cc_reg_1, PATTERN (insn)) > - || !prev > - || !modified_in_p (cc_reg_1, prev)) > - return; > - } > - else > - { > - rtx insn_set = single_set (insn); > - > - prev = prev_nonnote_nondebug_insn (insn); > - if (!prev > - || !insn_set > - || !single_set (prev)) > - return; > + rtx insn_set = single_set (insn); > > - } > + prev = prev_nonnote_nondebug_insn (insn); > + if (!prev > + || !insn_set > + || !single_set (prev)) > + return; > > if (targetm.sched.macro_fusion_pair_p (prev, insn)) > SCHED_GROUP_P (insn) = 1; > - > } Doesn't this avoid calling the target hook in cases where it used to call it before? Consider a conditional jump inside a parallel that is not a single set. Previously that could call the target hook and potentially set SCHED_GROUP_P. But after your change I think it would return without ever querying the backend. jeff
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 2e385c4..1a63ad0 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -13973,6 +13974,15 @@ aarch_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr) { enum attr_type prev_type = get_attr_type (prev); + unsigned int condreg1, condreg2; + rtx cc_reg_1; + aarch64_fixed_condition_code_regs (&condreg1, &condreg2); + cc_reg_1 = gen_rtx_REG (CCmode, condreg1); + if (!reg_referenced_p (cc_reg_1, PATTERN (curr)) + || !prev + || !modified_in_p (cc_reg_1, prev)) + return true; + /* FIXME: this misses some which is considered simple arthematic instructions for ThunderX. Simple shifts are missed here. */ if (prev_type == TYPE_ALUS_SREG diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 0b2fa1b..af14c90 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -29483,6 +29483,15 @@ ix86_macro_fusion_pair_p (rtx_insn *condgen, rtx_insn *condjmp) if (!any_condjump_p (condjmp)) return false; + unsigned int condreg1, condreg2; + rtx cc_reg_1; + ix86_fixed_condition_code_regs (&condreg1, &condreg2); + cc_reg_1 = gen_rtx_REG (CCmode, condreg1); + if (!reg_referenced_p (cc_reg_1, PATTERN (condjmp)) + || !condgen + || !modified_in_p (cc_reg_1, condgen)) + return false; + if (get_attr_type (condgen) != TYPE_TEST && get_attr_type (condgen) != TYPE_ICMP && get_attr_type (condgen) != TYPE_INCDEC diff --git a/gcc/sched-deps.c b/gcc/sched-deps.c index b2393bf..b15a865 100644 --- a/gcc/sched-deps.c +++ b/gcc/sched-deps.c @@ -2835,33 +2835,16 @@ sched_macro_fuse_insns (rtx_insn *insn) { rtx_insn *prev; - if (any_condjump_p (insn)) - { - unsigned int condreg1, condreg2; - rtx cc_reg_1; - targetm.fixed_condition_code_regs (&condreg1, &condreg2); - cc_reg_1 = gen_rtx_REG (CCmode, condreg1); - prev = prev_nonnote_nondebug_insn (insn); - if (!reg_referenced_p (cc_reg_1, PATTERN (insn)) - || !prev - || !modified_in_p (cc_reg_1, prev)) - return; - } - else - { - rtx insn_set = single_set (insn); - - prev = prev_nonnote_nondebug_insn (insn); - if (!prev - || !insn_set - || !single_set (prev)) - return; + rtx insn_set = single_set (insn); - } + prev = prev_nonnote_nondebug_insn (insn); + if (!prev + || !insn_set + || !single_set (prev)) + return; if (targetm.sched.macro_fusion_pair_p (prev, insn)) SCHED_GROUP_P (insn) = 1; - } /* Get the implicit reg pending clobbers for INSN and save them in TEMP. */