| Message ID | CAOvf_xzOrVZ3XM4aFSoy8izsSFTTequEFKXR-a9Ke_ibAs_f7Q@mail.gmail.com |
|---|---|
| State | New |
| Headers | show |
On Tue, Apr 15, 2014 at 6:12 PM, Evgeny Stupachenko <evstupac@gmail.com> wrote: > 3d part: > > 2014-04-15 Evgeny Stupachenko <evstupac@gmail.com> > > * config/i386/i386.c (x86_add_stmt_cost): Fixing vector cost model for > Silvermont. ... : Fix vector cost ... OK for mainline with the above ChangeLog fix. Thanks, Uros.
For the 3d part of the patch there was a misprint in estimated constant. It should be 1.7 instead of 1.8. - retval = (retval * 18) / 10; + retval = (retval * 17) / 10; Bootstarp passed. On Wed, Apr 16, 2014 at 12:02 PM, Uros Bizjak <ubizjak@gmail.com> wrote: > On Tue, Apr 15, 2014 at 6:12 PM, Evgeny Stupachenko <evstupac@gmail.com> wrote: >> 3d part: >> >> 2014-04-15 Evgeny Stupachenko <evstupac@gmail.com> >> >> * config/i386/i386.c (x86_add_stmt_cost): Fixing vector cost model for >> Silvermont. > > ... : Fix vector cost ... > > OK for mainline with the above ChangeLog fix. > > Thanks, > Uros.
On Wed, Apr 16, 2014 at 4:31 PM, Evgeny Stupachenko <evstupac@gmail.com> wrote: > For the 3d part of the patch there was a misprint in estimated > constant. It should be 1.7 instead of 1.8. > - retval = (retval * 18) / 10; > + retval = (retval * 17) / 10; > > Bootstarp passed. The change is also OK. BTW: trivial patch adjustments like this do not need re-approvals. The message to the ML should be enough. Uros.
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 0ae3cda..2522b5c 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -81,6 +81,7 @@ along with GCC; see the file COPYING3. If not see #include "context.h" #include "pass_manager.h" #include "target-globals.h" +#include "tree-vectorizer.h" static rtx legitimize_dllimport_symbol (rtx, bool); static rtx legitimize_pe_coff_extern_decl (rtx, bool); @@ -46329,6 +46330,18 @@ ix86_add_stmt_cost (void *data, int count, enum vect_cost_for_stmt kind, count *= 50; /* FIXME. */ retval = (unsigned) (count * stmt_cost); + + /* We need to multiply all vector stmt cost by 1.8 (estimated cost) + for Silvermont as it has out of order integer pipeline and can execute + 2 scalar instruction per tick, but has in order SIMD pipeline. */ + if (TARGET_SILVERMONT || TARGET_INTEL) + if (stmt_info && stmt_info->stmt) + { + tree lhs_op = gimple_get_lhs (stmt_info->stmt); + if (lhs_op && TREE_CODE (TREE_TYPE (lhs_op)) == INTEGER_TYPE) + retval = (retval * 18) / 10; + } + cost[where] += retval;
3d part: 2014-04-15 Evgeny Stupachenko <evstupac@gmail.com> * config/i386/i386.c (x86_add_stmt_cost): Fixing vector cost model for Silvermont. return retval; On Thu, Mar 6, 2014 at 12:58 AM, Evgeny Stupachenko <evstupac@gmail.com> wrote: > slm_cost/intel_cost and TARGET_SLOW_PSHUFB are just preparation to a > next vectorization patch. > Changes in ix86_add_stmt_cost gives real performance to Silvermont. > Let's move all to stage1. > > On Wed, Mar 5, 2014 at 9:29 PM, Uros Bizjak <ubizjak@gmail.com> wrote: >> On Wed, Mar 5, 2014 at 5:46 PM, H.J. Lu <hjl.tools@gmail.com> wrote: >>> On Wed, Mar 5, 2014 at 7:58 AM, Evgeny Stupachenko <evstupac@gmail.com> wrote: >>>> Hi, >>>> >>>> The patch is for x86 Silvermont. >>>> It improves x86 Silvermont vector cost model. >>>> It gives +20% on facerec spec on Silvermont. >>>> It passes make check and bootstrap on x86. >>>> >>>> Is this patch ok for stage1? >>>> >>>> ChangeLog: >>>> >>>> 2014-03-05 Evgeny Stupachenko <evstupac@gmail.com> >>>> >>>> * config/i386/x86-tune.def (TARGET_SLOW_PSHUFB): Target for slow byte >>>> shuffle on some x86 architectures. >>>> * config/i386/i386.h (TARGET_SLOW_PSHUFB): Ditto. >>>> * config/i386/i386.c (processor_costs): Fixing vec_to_scalar_cost for >>>> Silvermont according latency table. >>>> (expand_vec_perm_even_odd_1): Avoid byte shuffles in architectures >>>> where they are slow (TARGET_SLOW_PSHUFB). >>>> (x86_add_stmt_cost): Fixing vector cost model for Silvermont. >>>> >>>> Thanks, >>>> Evgeny >>> >>> There are 3 separate changes in this patch: >>> >>> 1. Update slm_cost, which doesn't have a ChangeLog entry. >>> 2. Add TARGET_SLOW_PSHUFB. >>> 3. Update ix86_add_stmt_cost. >>> >>> I suggest you break it into 3 independent patches. >> >> I think that slm_cost/intel_cost and TARGET_SLOW_PSHUFB changes can >> still go into mainline at this stage since they are trivial tuning >> changes that should not destabilize the compiler. >> >> The ix86_add_stmt_cost should wait for stage 1. >> >> Uros.