diff mbox

[PARCH,2/2,x86,PR63534] Fix darwin bootstrap

Message ID CAOvf_xym6ajUDA2caCCtKr1=vVzOYZwaiV-0UO=Xyxhti2bDYg@mail.gmail.com
State New
Headers show

Commit Message

Evgeny Stupachenko Oct. 22, 2014, 3:55 p.m. UTC
There is a test for Linux x86 that also fails without the changes in the patch:

ChangeLog:

2014-10-22  Evgeny Stupachenko  <evstupac@gmail.com>

        PR rtl-optimization/63618
        * gcc.target/i386/pr63618.c: New.



On Fri, Oct 17, 2014 at 6:16 PM, Evgeny Stupachenko <evstupac@gmail.com> wrote:
> Hi,
>
> Some instructions (like one in PR63534) could have hidden use of PIC register.
> Therefore we need to leave SET_GOT not deleted till reload completed.
> The patch prevents SET_GOT from deleting while PIC register is pseudo.
>
> Is it ok?
>
> ChangeLog:
>
> 2014-10-17  Evgeny Stupachenko  <evstupac@gmail.com>
>
>         PR target/63534
>         * cse.c (delete_trivially_dead_insns): Consider PIC register is used
>         while it is pseudo.
>         * dse.c (deletable_insn_p): Likewise.
>
> diff --git a/gcc/cse.c b/gcc/cse.c
> index be2f31b..062ba45 100644
> --- a/gcc/cse.c
> +++ b/gcc/cse.c
> @@ -6953,6 +6953,11 @@ delete_trivially_dead_insns (rtx_insn *insns, int nreg)
>        /* If no debug insns can be present, COUNTS is just an array
>          which counts how many times each pseudo is used.  */
>      }
> +  /* Pseudo PIC register should be considered as used due to possible
> +     new usages generated.  */
> +  if (pic_offset_table_rtx
> +      && REGNO (pic_offset_table_rtx) >= FIRST_PSEUDO_REGISTER)
> +    counts[REGNO (pic_offset_table_rtx)]++;
>    /* Go from the last insn to the first and delete insns that only set unused
>       registers or copy a register to itself.  As we delete an insn, remove
>       usage counts for registers it uses.
> diff --git a/gcc/dce.c b/gcc/dce.c
> index 5b7d36e..a52a59c 100644
> --- a/gcc/dce.c
> +++ b/gcc/dce.c
> @@ -127,6 +127,10 @@ deletable_insn_p (rtx_insn *insn, bool fast,
> bitmap arg_stores)
>      if (HARD_REGISTER_NUM_P (DF_REF_REGNO (def))
>         && global_regs[DF_REF_REGNO (def)])
>        return false;
> +    /* Initialization of pseudo PIC register should never be removed.  */
> +    else if (DF_REF_REG (def) == pic_offset_table_rtx
> +            && REGNO (pic_offset_table_rtx) >= FIRST_PSEUDO_REGISTER)
> +      return false;
>
>    body = PATTERN (insn);
>    switch (GET_CODE (body))

Comments

Jakub Jelinek Oct. 22, 2014, 4:01 p.m. UTC | #1
On Wed, Oct 22, 2014 at 07:55:57PM +0400, Evgeny Stupachenko wrote:
> There is a test for Linux x86 that also fails without the changes in the patch:
> 
> ChangeLog:
> 
> 2014-10-22  Evgeny Stupachenko  <evstupac@gmail.com>
> 
>         PR rtl-optimization/63618
>         * gcc.target/i386/pr63618.c: New.
> 
> diff --git a/gcc/testsuite/gcc.target/i386/pr63618.c
> b/gcc/testsuite/gcc.target/i386/pr63618.c
> new file mode 100644
> index 0000000..cf10a2b
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/i386/pr63618.c
> @@ -0,0 +1,34 @@
> +/* PR rtl-optimization/63618 */
> +/* { dg-do run } */
> +/* { dg-require-effective-target sse4 } */
> +/* { dg-require-effective-target ia32 } */
> +/* { dg-options "-O2 -msse4.2 -mtune=corei7 -fno-inline -fPIC" } */

What is ia32 specific on the test?
As for -msse4.2 and sse4 effective target, I'd say
better would be to stick that to
/* { dg-additional-options "-msse4.2" { target sse4 } } */
Similarly, you want -fPIC only if { target fpic }, thus I'd say you want to
start the test with:
/* { dg-do run } */
/* { dg-options "-O2 -mtune=corei7 -fno-inline" } */
/* { dg-additional-options "-msse4.2" { target sse4 } } */
/* { dg-additional-options "-fpic" { target fpic } } */

	Jakub
diff mbox

Patch

diff --git a/gcc/testsuite/gcc.target/i386/pr63618.c
b/gcc/testsuite/gcc.target/i386/pr63618.c
new file mode 100644
index 0000000..cf10a2b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr63618.c
@@ -0,0 +1,34 @@ 
+/* PR rtl-optimization/63618 */
+/* { dg-do run } */
+/* { dg-require-effective-target sse4 } */
+/* { dg-require-effective-target ia32 } */
+/* { dg-options "-O2 -msse4.2 -mtune=corei7 -fno-inline -fPIC" } */
+
+static const __float128 cf = 0.1E+10Q;
+
+__float128
+f128_square(__float128 x)
+{
+  return x * x;
+}
+
+__float128
+f128_p3(__float128 x)
+{
+  return x * x * x;
+}
+
+__float128
+cond_f128_square (__float128 x, int p)
+{
+  x = f128_p3 (x);
+  if (p)
+    x = f128_square(cf);
+  return x;
+}
+
+int main()
+{
+  __float128 x = cond_f128_square (cf, 1);
+  return (int)(x < cf);
+}