[x86] Update PARTIAL_REG_DEPENDENCY tune

Hi,

We've met several performance issues (up to 15%) on Silvermont caused
by the PARTIAL_REG_DEPENDENCY tuning.
Previously discussed here: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=57954
Propose removing Silvermont related tune from PARTIAL_REG_DEPENDENCY.

The patch passed bootstrap, make check.

Is it ok for trunk?

Thanks,
Evgeny

2014-10-10  Evgeny Stupachenko  <evstupac@gmail.com>

        * config/i386/x86-tune.def (X86_TUNE_PARTIAL_REG_DEPENDENCY):
        Remove m_SILVERMONT and m_INTEL from the tune.

    are resolved on SSE register parts instead of whole registers, so we may

On Fri, Oct 10, 2014 at 5:07 PM, Evgeny Stupachenko <evstupac@gmail.com> wrote:

> We've met several performance issues (up to 15%) on Silvermont caused
> by the PARTIAL_REG_DEPENDENCY tuning.
> Previously discussed here: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=57954
> Propose removing Silvermont related tune from PARTIAL_REG_DEPENDENCY.
>
> The patch passed bootstrap, make check.
>
> Is it ok for trunk?

OK.

Thanks,
Uros.

On Fri, Oct 10, 2014 at 8:07 AM, Evgeny Stupachenko <evstupac@gmail.com> wrote:
> Hi,
>
> We've met several performance issues (up to 15%) on Silvermont caused
> by the PARTIAL_REG_DEPENDENCY tuning.
> Previously discussed here: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=57954
> Propose removing Silvermont related tune from PARTIAL_REG_DEPENDENCY.
>
> The patch passed bootstrap, make check.
>
> Is it ok for trunk?
>
> Thanks,
> Evgeny
>
> 2014-10-10  Evgeny Stupachenko  <evstupac@gmail.com>
>
>         * config/i386/x86-tune.def (X86_TUNE_PARTIAL_REG_DEPENDENCY):

^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
It should be X86_TUNE_SSE_PARTIAL_REG_DEPENDENCY.

>         Remove m_SILVERMONT and m_INTEL from the tune.
>
> diff --git a/gcc/config/i386/x86-tune.def b/gcc/config/i386/x86-tune.def
> index 215c63c..b6b210e 100644
> --- a/gcc/config/i386/x86-tune.def
> +++ b/gcc/config/i386/x86-tune.def
> @@ -58,8 +58,8 @@ DEF_TUNE (X86_TUNE_PARTIAL_REG_DEPENDENCY,
> "partial_reg_dependency",
>     SPECfp regression, while enabling it on K8 brings roughly 2.4% regression
>     that can be partly masked by careful scheduling of moves.  */
>  DEF_TUNE (X86_TUNE_SSE_PARTIAL_REG_DEPENDENCY, "sse_partial_reg_dependency",
> -          m_PPRO | m_P4_NOCONA | m_CORE_ALL | m_BONNELL | m_SILVERMONT
> -         | m_INTEL | m_AMDFAM10 | m_BDVER | m_GENERIC)
> +          m_PPRO | m_P4_NOCONA | m_CORE_ALL | m_BONNELL | m_AMDFAM10
> +         | m_BDVER | m_GENERIC)
>
>  /* X86_TUNE_SSE_SPLIT_REGS: Set for machines where the type and dependencies
>     are resolved on SSE register parts instead of whole registers, so we may

Thanks. I've modified ChangeLog.

2014-10-10  Evgeny Stupachenko  <evstupac@gmail.com>

        * config/i386/x86-tune.def (X86_TUNE_SSE_PARTIAL_REG_DEPENDENCY):
        Remove m_SILVERMONT and m_INTEL from the tune.

On Fri, Oct 10, 2014 at 7:58 PM, H.J. Lu <hjl.tools@gmail.com> wrote:
> On Fri, Oct 10, 2014 at 8:07 AM, Evgeny Stupachenko <evstupac@gmail.com> wrote:
>> Hi,
>>
>> We've met several performance issues (up to 15%) on Silvermont caused
>> by the PARTIAL_REG_DEPENDENCY tuning.
>> Previously discussed here: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=57954
>> Propose removing Silvermont related tune from PARTIAL_REG_DEPENDENCY.
>>
>> The patch passed bootstrap, make check.
>>
>> Is it ok for trunk?
>>
>> Thanks,
>> Evgeny
>>
>> 2014-10-10  Evgeny Stupachenko  <evstupac@gmail.com>
>>
>>         * config/i386/x86-tune.def (X86_TUNE_PARTIAL_REG_DEPENDENCY):
>
> ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
> It should be X86_TUNE_SSE_PARTIAL_REG_DEPENDENCY.
>
>>         Remove m_SILVERMONT and m_INTEL from the tune.
>>
>> diff --git a/gcc/config/i386/x86-tune.def b/gcc/config/i386/x86-tune.def
>> index 215c63c..b6b210e 100644
>> --- a/gcc/config/i386/x86-tune.def
>> +++ b/gcc/config/i386/x86-tune.def
>> @@ -58,8 +58,8 @@ DEF_TUNE (X86_TUNE_PARTIAL_REG_DEPENDENCY,
>> "partial_reg_dependency",
>>     SPECfp regression, while enabling it on K8 brings roughly 2.4% regression
>>     that can be partly masked by careful scheduling of moves.  */
>>  DEF_TUNE (X86_TUNE_SSE_PARTIAL_REG_DEPENDENCY, "sse_partial_reg_dependency",
>> -          m_PPRO | m_P4_NOCONA | m_CORE_ALL | m_BONNELL | m_SILVERMONT
>> -         | m_INTEL | m_AMDFAM10 | m_BDVER | m_GENERIC)
>> +          m_PPRO | m_P4_NOCONA | m_CORE_ALL | m_BONNELL | m_AMDFAM10
>> +         | m_BDVER | m_GENERIC)
>>
>>  /* X86_TUNE_SSE_SPLIT_REGS: Set for machines where the type and dependencies
>>     are resolved on SSE register parts instead of whole registers, so we may
>
>
>
> --
> H.J.