| Message ID | CAMe9rOq7V44aEi=c7aTOTyzOpu99+MJ5sM+=id_H-MJq6P4eKQ@mail.gmail.com |
|---|---|
| State | New |
| Headers | show |
| Series | [wwwdocs] Update GCC 9 release note | expand |
On Thu, Oct 3, 2019 at 4:55 PM H.J. Lu <hjl.tools@gmail.com> wrote: > > Here is the patch to update GCC 9 release note. Is it OK? > Here is the same patch for git repo. Is it OK? Thanks.
On Thu, 10 Oct 2019, H.J. Lu wrote:
> Here is the same patch for git repo. Is it OK?
Has this been available since GCC 9.1, or has it been added later?
(If the latter, please add this to a GCC 9.2 or GCC 9.3 section in
that file).
Ok.
Gerald
On Sun, Oct 20, 2019 at 10:19 AM Gerald Pfeifer <gerald@pfeifer.com> wrote: > > On Thu, 10 Oct 2019, H.J. Lu wrote: > > Here is the same patch for git repo. Is it OK? > > Has this been available since GCC 9.1, or has it been added later? They have been checked into GCC 9.1. > (If the latter, please add this to a GCC 9.2 or GCC 9.3 section in > that file). > > Ok. > > Gerald
Index: htdocs/gcc-9/changes.html =================================================================== RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-9/changes.html,v retrieving revision 1.77 diff -u -p -r1.77 changes.html --- htdocs/gcc-9/changes.html 11 Sep 2019 13:27:47 -0000 1.77 +++ htdocs/gcc-9/changes.html 3 Oct 2019 23:54:31 -0000 @@ -936,6 +936,13 @@ $ g++ typo.cc <h3 id="x86">IA-32/x86-64</h3> <ul> <li>Support of Intel MPX (Memory Protection Extensions) has been removed.</li> + <li>New ISA extension support for Intel PTWRITE was added to GCC. PTWRITE + intrinsics are available via the <code>-mptwrite</code> compiler switch. + </li> + <li>GCC now supports the Intel CPU named Cascade Lake with AVX512 extensions + through <code>-march=cascadelake</code>. The switch enables the following + ISA extensions: AVX512F, AVX512VL, AVX512CD, AVX512BW, AVX512DQ, AVX512VNNI. + </li> </ul>