From patchwork Wed Jan 27 16:02:51 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 574066 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 910F3140C92 for ; Thu, 28 Jan 2016 03:03:05 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=u5Qmwgwd; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:in-reply-to:references:date:message-id:subject :from:to:cc:content-type; q=dns; s=default; b=hgO0N9EIeWVQ58dzyH cKzi6Fb/JTL4agm9Py5h++M9wOOj5u+yMQve/Wzuzxn1yK8obmDfzBveUw9FgZ7T IH3kY0inE4Skha7SM8GpE5qPNNdgm05IbIMvREa+DzoFSGZa7Xy8AKE6SRiwiibV kw3L/V7zbYohzliXV0Kjuzyzk= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:in-reply-to:references:date:message-id:subject :from:to:cc:content-type; s=default; bh=LPsgp4uzZ2mgXt83bhW31Itb bYY=; b=u5QmwgwdFO/3iemiX74htZupV57j0TUz52gmCWIvAZuleoawiS1VzdSj zWbnzwq7NCq1Xp0CFQ8Vj5JIRhAov4B2zJ7dSFcJn7iAUafPW+QXYa7PFmm0i1BU 8MlLojxbcrgHywU3PNbydHNZbInKMlr3npqVQ+Xfdn9II/kGfwc= Received: (qmail 100748 invoked by alias); 27 Jan 2016 16:02:55 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 100640 invoked by uid 89); 27 Jan 2016 16:02:55 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.5 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 spammy=enkovich.gnu@gmail.com, enkovichgnugmailcom X-HELO: mail-qk0-f182.google.com Received: from mail-qk0-f182.google.com (HELO mail-qk0-f182.google.com) (209.85.220.182) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Wed, 27 Jan 2016 16:02:53 +0000 Received: by mail-qk0-f182.google.com with SMTP id s68so5090263qkh.3 for ; Wed, 27 Jan 2016 08:02:53 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type; bh=8OS1PN9yemS4O8ffUnRYlQ82/ADarCUPQ6Gx3wAPu0M=; b=nC9r2KrMH2ZzY9rvbfG3A6FE83zSnM8QKo3pwMTyQGBIVW78KK0io6pxGr9tQY1XMl ++gyZVVRoX1wzk4dX3uQCBi2/aLhs0VehnEvJq91FqRwNRQ4J83RmmHvOaNo0MHWaT/u IFI6RzaNx0USz+UF/lGm5SKL5pgCvKBpMmlsOWKB1+/wxe568qxbvDLibqZBLeBVVphS x9gSD4TMtvNmyc0j+5Yp3MQnlNGfqHEmnDSzCBXzrTog1lCTOhUGpE5pDAB23vkNOsaj KYvjpYTj+ZN7gftPy/wLsLzT5fs5e1k/OSYogDGze1D8dAqIj96z5Z0cFXOMSasIkwX1 98Zw== X-Gm-Message-State: AG10YOQ8I3d6k7zpgHFouIiTFBqufezM/10YFKmsmbdwxyDjujY9tDaupAmpKKg5jvqHZYMqoZRMfl6ypKoixw== MIME-Version: 1.0 X-Received: by 10.55.24.88 with SMTP id j85mr3523451qkh.98.1453910571376; Wed, 27 Jan 2016 08:02:51 -0800 (PST) Received: by 10.55.4.210 with HTTP; Wed, 27 Jan 2016 08:02:51 -0800 (PST) In-Reply-To: <20160127153441.GA16081@msticlxl57.ims.intel.com> References: <20160127153441.GA16081@msticlxl57.ims.intel.com> Date: Wed, 27 Jan 2016 08:02:51 -0800 Message-ID: Subject: Re: [PATCH, PR target/69454] Disable TARGET_STV when stack is not properly aligned From: "H.J. Lu" To: Ilya Enkovich Cc: GCC Patches X-IsSubscribed: yes On Wed, Jan 27, 2016 at 7:34 AM, Ilya Enkovich wrote: > Hi, > > Currently STV pass may require a stack realignment if any > transformation occurs to enable SSE registers spill/fill. > It appears it's invalid to increase stack alignment requirements > at this point. Thus we have to either assume we need stack to be > aligned if are going to run STV pass or disable STV if stack is > not properly aligned. I suppose we shouldn't ignore explicitly > requested stack alignment not beeing sure we really optimize > anything (and STV is not an optimization frequiently applied). > So I think we may disable TARGET_STV for such cases as Jakub > suggested. This patch was bootstrapped and regtested on > x86_64-pc-linux-gnu. OK for trunk? > > diff --git a/gcc/testsuite/gcc.target/i386/pr69454-1.c b/gcc/testsuite/gcc.target/i386/pr69454-1.c > new file mode 100644 > index 0000000..12ecfd3 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/i386/pr69454-1.c > @@ -0,0 +1,11 @@ > +/* { dg-do compile { target { ia32 } } } */ > +/* { dg-options "-O2 -msse2 -mno-accumulate-outgoing-args -mpreferred-stack-boundary=2" } */ > + > +typedef struct { long long w64[2]; } V128; > +extern V128* fn2(void); > +long long a; > +V128 b; > +void fn1() { > + V128 *c = fn2(); > + c->w64[0] = a ^ b.w64[0]; > +} > diff --git a/gcc/testsuite/gcc.target/i386/pr69454-2.c b/gcc/testsuite/gcc.target/i386/pr69454-2.c > new file mode 100644 > index 0000000..28bab93 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/i386/pr69454-2.c > @@ -0,0 +1,13 @@ > +/* { dg-do compile { target { ia32 } } } */ > +/* { dg-options "-O2 -mpreferred-stack-boundary=2" } */ This needs: +/* { dg-options "-O2 -msse2 -mno-accumulate-outgoing-args -mpreferred-stack-boundary=2" } */ to trigger. > +extern void fn2 (); > +long long a, b; > + > +void fn1 () > +{ > + long long c = a; > + a = b ^ a; > + fn2 (); > + a = c; > +} Here is a different patch, which I believe is the right fix. From 86e040399dd5ca6b23597be4aff5edb9ac2ab5d7 Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Mon, 25 Jan 2016 12:31:45 -0800 Subject: [PATCH] Don't align DImode to 32 bits if the STV pass is enabled Since the STV pass uses SSE2 instructions on DImode which needs 64-bit alignment for DImode, don't align DImode to 32 bits if the STV pass is enabled. gcc/ PR target/69454 * config/i386/i386.c (convert_scalars_to_vector): Don't change stack alignment here. (ix86_minimum_alignment): Don't align DImode to 32 bits if the STV pass is enabled. gcc/testsuite/ PR target/69454 * gcc.target/i386/pr69454-1.c: New test. * gcc.target/i386/pr69454-2.c: Likewise. --- gcc/config/i386/i386.c | 16 ++++------------ gcc/testsuite/gcc.target/i386/pr69454-1.c | 11 +++++++++++ gcc/testsuite/gcc.target/i386/pr69454-2.c | 13 +++++++++++++ 3 files changed, 28 insertions(+), 12 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr69454-1.c create mode 100644 gcc/testsuite/gcc.target/i386/pr69454-2.c diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index cfbdf0f..8babdaf 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -3588,16 +3588,6 @@ convert_scalars_to_vector () bitmap_obstack_release (NULL); df_process_deferred_rescans (); - /* Conversion means we may have 128bit register spills/fills - which require aligned stack. */ - if (converted_insns) - { - if (crtl->stack_alignment_needed < 128) - crtl->stack_alignment_needed = 128; - if (crtl->stack_alignment_estimated < 128) - crtl->stack_alignment_estimated = 128; - } - return 0; } @@ -29299,8 +29289,10 @@ ix86_minimum_alignment (tree exp, machine_mode mode, return align; /* Don't do dynamic stack realignment for long long objects with - -mpreferred-stack-boundary=2. */ - if ((mode == DImode || (type && TYPE_MODE (type) == DImode)) + -mpreferred-stack-boundary=2. The STV pass uses SSE2 instructions + on DImode which needs 64-bit alignment for DImode. */ + if (!(TARGET_STV && TARGET_SSE2 && optimize > 1) + && (mode == DImode || (type && TYPE_MODE (type) == DImode)) && (!type || !TYPE_USER_ALIGN (type)) && (!decl || !DECL_USER_ALIGN (decl))) return 32; diff --git a/gcc/testsuite/gcc.target/i386/pr69454-1.c b/gcc/testsuite/gcc.target/i386/pr69454-1.c new file mode 100644 index 0000000..12ecfd3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr69454-1.c @@ -0,0 +1,11 @@ +/* { dg-do compile { target { ia32 } } } */ +/* { dg-options "-O2 -msse2 -mno-accumulate-outgoing-args -mpreferred-stack-boundary=2" } */ + +typedef struct { long long w64[2]; } V128; +extern V128* fn2(void); +long long a; +V128 b; +void fn1() { + V128 *c = fn2(); + c->w64[0] = a ^ b.w64[0]; +} diff --git a/gcc/testsuite/gcc.target/i386/pr69454-2.c b/gcc/testsuite/gcc.target/i386/pr69454-2.c new file mode 100644 index 0000000..4820b76 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr69454-2.c @@ -0,0 +1,13 @@ +/* { dg-do compile { target { ia32 } } } */ +/* { dg-options "-O2 -msse2 -mno-accumulate-outgoing-args -mpreferred-stack-boundary=2" } */ + +extern void fn2 (void); +long long a, b; +void +fn1 (void) +{ + long long c = a; + a = b ^ a; + fn2 (); + a = c; +} -- 2.5.0