From patchwork Tue Mar 29 14:08:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lewis Revill X-Patchwork-Id: 1610648 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=embecosm.com header.i=@embecosm.com header.a=rsa-sha256 header.s=google header.b=M3zuaVwe; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Received: from sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KSWdm6Nlmz9sBJ for ; Wed, 30 Mar 2022 01:09:15 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 49FF0388883C for ; Tue, 29 Mar 2022 14:09:13 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-pl1-x633.google.com (mail-pl1-x633.google.com [IPv6:2607:f8b0:4864:20::633]) by sourceware.org (Postfix) with ESMTPS id 159693858C50 for ; Tue, 29 Mar 2022 14:08:48 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 159693858C50 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=embecosm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=embecosm.com Received: by mail-pl1-x633.google.com with SMTP id j13so17727178plj.8 for ; Tue, 29 Mar 2022 07:08:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=embecosm.com; s=google; h=mime-version:from:date:message-id:subject:to; bh=JK41QeJc8BDVkdEpA/+6Gq1ZDF1D6WTkEhj4ufzK0so=; b=M3zuaVweN0fjNhBL9BWleBB7HuqzItmSY6K4LZCsbwOfommsSq2Gk8Bp2eWB9xx9Sk rzwSKzhHD7RYRSMnTomubL2N1GN3CzaDlqwn8geuseoVRdYZXUyTHEfEBJxkJ5kjlkbA QURef62wvHIw0VDbwUtF+fOBq3CKnmyn1usY3HK8KSuNmyioQDtUotEYMcVirQXGgP3W 3tuA2+xz6egG2CKPXom2JxtwIYDM4MyoLYNjFzQiKoIAoiWgZb4iZpcXhBYFDnvNPwDw 19wtX/1Px0DEp+HIekh/VDAARxSTcNU8z8Gm5jzEKR8fKev5fJdETE16c43rQRbg3G/W WQiw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:from:date:message-id:subject:to; bh=JK41QeJc8BDVkdEpA/+6Gq1ZDF1D6WTkEhj4ufzK0so=; b=DwtlNCZn4MJvMZ9l7+2lA+w8R/pncVq/XxjD/lMqImyPk4iCVzGpyhYMwczPPNWSAZ WZDootCOH6r//KatDUDqKdrNXpoMm8k9TSGwmGWs1IRKVCcihIVOjjXmmZ3o/WkoLhJm 5Jxjuqs+8apNFQjOUmhDTrrcP59wxymgPDJt7ncbDKEuIZu+MfRWFeWAjuuoVKd4QFHM sVRX2/NmIol1LEEwbWYFdN7osFzpIIGrkLbApREl6L0fFP00M/szvLDTAlPNiAXqTeYr 7u3pg9zhs/WHUgLmn4giMS7sf8GiELjr44PV78iWSkpcWyfyGFwV7mNkF3ohd0z8tj+j Xo/Q== X-Gm-Message-State: AOAM5312Yg7AxCMNmziL+/VlJOH9ZX3Mr6irSbdOgWZo4SJfwpgF03TD ISEytV4WcR5kWMElGXoo91IKue+Jl3rRCkXkoTlMhoj4JA8RrA== X-Google-Smtp-Source: ABdhPJz+7sxsh0qxSfq5TBVIzpnFNcHedN0yDFnhjAUhOhKDN8PPUwMvzE3gmp9rVj79EPy2Q5CKdMnGYSJ0t2A6sB0= X-Received: by 2002:a17:902:d2c4:b0:154:7d5d:fe3d with SMTP id n4-20020a170902d2c400b001547d5dfe3dmr30682871plc.74.1648562926606; Tue, 29 Mar 2022 07:08:46 -0700 (PDT) MIME-Version: 1.0 From: Lewis Revill Date: Tue, 29 Mar 2022 15:08:35 +0100 Message-ID: Subject: [PATCH] libgcc, riscv: Add restore libcalls to be used by tail calling functions To: gcc-patches@gcc.gnu.org X-Spam-Status: No, score=-9.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, HTML_MESSAGE, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-Content-Filtered-By: Mailman/MimeDel 2.1.29 X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" Currently the existing libcalls for restoring registers have the requirement that they must be tail called by the parent function, so that they can safely return through the restored return address register. This does impose the restriction that the libcalls cannot be used if there already exists a tail call at the end of the parent function in question, and as such this patch forms part of an effort to rectify this situation. There already exists patches to LLVM and Compiler-RT to add the libcalls and the capability for the compiler to generate them (https://reviews.llvm.org/D91720 and https://reviews.llvm.org/D91719), and the behaviour that we want to standardize across the compilers is documented in the following pull request to the RISC-V toolchain conventions repository: https://github.com/riscv-non-isa/riscv-toolchain-conventions/pull/10 The libcalls added in this patch follow that documented behaviour and are based off a suggested implementation provided by Jim Wilson in the thread of that pull request. Similar to the existing restore libcalls, restores are grouped according to the expected stack alignment, and the 'upper' libcalls fall through to the lower libcalls, finally ending in return through the temporary register t1. libgcc/ * config/riscv/restore-tail.S: Add restore libcalls compatible with use from functions ending in tail calls. * config/riscv/t-elf: Add file restore-tail.S. --- libgcc/config/riscv/restore-tail.S | 279 +++++++++++++++++++++++++++++ libgcc/config/riscv/t-elf | 1 + 2 files changed, 280 insertions(+) create mode 100644 libgcc/config/riscv/restore-tail.S diff --git a/libgcc/config/riscv/restore-tail.S b/libgcc/config/riscv/restore-tail.S new file mode 100644 index 00000000000..54116beff17 --- /dev/null +++ b/libgcc/config/riscv/restore-tail.S @@ -0,0 +1,279 @@ +/* Tail-call compatible callee-saved register restore routines for RISC-V. + + Copyright (C) 2022 Free Software Foundation, Inc. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify it under +the terms of the GNU General Public License as published by the Free +Software Foundation; either version 3, or (at your option) any later +version. + +GCC is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +. */ + +#include "riscv-asm.h" + + .text + +#if __riscv_xlen == 64 + +FUNC_BEGIN (__riscv_restore_tailcall_12) + .cfi_startproc + .cfi_def_cfa_offset 112 + .cfi_offset 27, -104 + .cfi_offset 26, -96 + .cfi_offset 25, -88 + .cfi_offset 24, -80 + .cfi_offset 23, -72 + .cfi_offset 22, -64 + .cfi_offset 21, -56 + .cfi_offset 20, -48 + .cfi_offset 19, -40 + .cfi_offset 18, -32 + .cfi_offset 9, -24 + .cfi_offset 8, -16 + .cfi_offset 1, -8 + ld s11, 8(sp) + .cfi_restore 27 + addi sp, sp, 16 + +FUNC_BEGIN (__riscv_restore_tailcall_11) +FUNC_BEGIN (__riscv_restore_tailcall_10) + .cfi_restore 27 + .cfi_def_cfa_offset 96 + ld s10, 0(sp) + .cfi_restore 26 + ld s9, 8(sp) + .cfi_restore 25 + addi sp, sp, 16 + +FUNC_BEGIN (__riscv_restore_tailcall_9) +FUNC_BEGIN (__riscv_restore_tailcall_8) + .cfi_restore 25 + .cfi_restore 26 + .cfi_restore 27 + .cfi_def_cfa_offset 80 + ld s8, 0(sp) + .cfi_restore 24 + ld s7, 8(sp) + .cfi_restore 23 + addi sp, sp, 16 + +FUNC_BEGIN (__riscv_restore_tailcall_7) +FUNC_BEGIN (__riscv_restore_tailcall_6) + .cfi_restore 23 + .cfi_restore 24 + .cfi_restore 25 + .cfi_restore 26 + .cfi_restore 27 + .cfi_def_cfa_offset 64 + ld s6, 0(sp) + .cfi_restore 22 + ld s5, 8(sp) + .cfi_restore 21 + addi sp, sp, 16 + +FUNC_BEGIN (__riscv_restore_tailcall_5) +FUNC_BEGIN (__riscv_restore_tailcall_4) + .cfi_restore 21 + .cfi_restore 22 + .cfi_restore 23 + .cfi_restore 24 + .cfi_restore 25 + .cfi_restore 26 + .cfi_restore 27 + .cfi_def_cfa_offset 48 + ld s4, 0(sp) + .cfi_restore 20 + ld s3, 8(sp) + .cfi_restore 19 + addi sp, sp, 16 + +FUNC_BEGIN (__riscv_restore_tailcall_3) +FUNC_BEGIN (__riscv_restore_tailcall_2) + .cfi_restore 19 + .cfi_restore 20 + .cfi_restore 21 + .cfi_restore 22 + .cfi_restore 23 + .cfi_restore 24 + .cfi_restore 25 + .cfi_restore 26 + .cfi_restore 27 + .cfi_def_cfa_offset 32 + ld s2, 0(sp) + .cfi_restore 18 + ld s1, 8(sp) + .cfi_restore 9 + addi sp, sp, 16 + +FUNC_BEGIN (__riscv_restore_tailcall_1) +FUNC_BEGIN (__riscv_restore_tailcall_0) + .cfi_restore 9 + .cfi_restore 18 + .cfi_restore 19 + .cfi_restore 20 + .cfi_restore 21 + .cfi_restore 22 + .cfi_restore 23 + .cfi_restore 24 + .cfi_restore 25 + .cfi_restore 26 + .cfi_restore 27 + .cfi_def_cfa_offset 16 + ld s0, 0(sp) + .cfi_restore 8 + ld ra, 8(sp) + .cfi_restore 1 + addi sp, sp, 16 + .cfi_def_cfa_offset 0 + jr t1 + .cfi_endproc +FUNC_END (__riscv_restore_tailcall_12) +FUNC_END (__riscv_restore_tailcall_11) +FUNC_END (__riscv_restore_tailcall_10) +FUNC_END (__riscv_restore_tailcall_9) +FUNC_END (__riscv_restore_tailcall_8) +FUNC_END (__riscv_restore_tailcall_7) +FUNC_END (__riscv_restore_tailcall_6) +FUNC_END (__riscv_restore_tailcall_5) +FUNC_END (__riscv_restore_tailcall_4) +FUNC_END (__riscv_restore_tailcall_3) +FUNC_END (__riscv_restore_tailcall_2) +FUNC_END (__riscv_restore_tailcall_1) +FUNC_END (__riscv_restore_tailcall_0) + +#else + +#ifdef __riscv_32e +FUNC_BEGIN(__riscv_restore_tailcall_2) +FUNC_BEGIN(__riscv_restore_tailcall_1) +FUNC_BEGIN(__riscv_restore_tailcall_0) + .cfi_startproc + .cfi_def_cfa_offset 14 + lw s1, 0(sp) + .cfi_restore 9 + lw s0, 4(sp) + .cfi_restore 8 + lw ra, 8(sp) + .cfi_restore 1 + addi sp, sp, 12 + .cfi_def_cfa_offset 0 + jr t1 + .cfi_endproc +FUNC_END(__riscv_restore_tailcall_2) +FUNC_END(__riscv_restore_tailcall_1) +FUNC_END(__riscv_restore_tailcall_0) + +#else + +FUNC_BEGIN (__riscv_restore_tailcall_12) + .cfi_startproc + .cfi_def_cfa_offset 64 + .cfi_offset 27, -52 + .cfi_offset 26, -48 + .cfi_offset 25, -44 + .cfi_offset 24, -40 + .cfi_offset 23, -36 + .cfi_offset 22, -32 + .cfi_offset 21, -28 + .cfi_offset 20, -24 + .cfi_offset 19, -20 + .cfi_offset 18, -16 + .cfi_offset 9, -12 + .cfi_offset 8, -8 + .cfi_offset 1, -4 + lw s11, 12(sp) + .cfi_restore 27 + addi sp, sp, 16 + +FUNC_BEGIN (__riscv_restore_tailcall_11) +FUNC_BEGIN (__riscv_restore_tailcall_10) +FUNC_BEGIN (__riscv_restore_tailcall_9) +FUNC_BEGIN (__riscv_restore_tailcall_8) + .cfi_restore 27 + .cfi_def_cfa_offset 48 + lw s10, 0(sp) + .cfi_restore 26 + lw s9, 4(sp) + .cfi_restore 25 + lw s8, 8(sp) + .cfi_restore 24 + lw s7, 12(sp) + .cfi_restore 23 + addi sp, sp, 16 + +FUNC_BEGIN (__riscv_restore_tailcall_7) +FUNC_BEGIN (__riscv_restore_tailcall_6) +FUNC_BEGIN (__riscv_restore_tailcall_5) +FUNC_BEGIN (__riscv_restore_tailcall_4) + .cfi_restore 23 + .cfi_restore 24 + .cfi_restore 25 + .cfi_restore 26 + .cfi_restore 27 + .cfi_def_cfa_offset 32 + lw s6, 0(sp) + .cfi_restore 22 + lw s5, 4(sp) + .cfi_restore 21 + lw s4, 8(sp) + .cfi_restore 20 + lw s3, 12(sp) + .cfi_restore 19 + addi sp, sp, 16 + +FUNC_BEGIN (__riscv_restore_tailcall_3) +FUNC_BEGIN (__riscv_restore_tailcall_2) +FUNC_BEGIN (__riscv_restore_tailcall_1) +FUNC_BEGIN (__riscv_restore_tailcall_0) + .cfi_restore 19 + .cfi_restore 20 + .cfi_restore 21 + .cfi_restore 22 + .cfi_restore 24 + .cfi_restore 25 + .cfi_restore 26 + .cfi_restore 27 + .cfi_def_cfa_offset 16 + lw s2, 0(sp) + .cfi_restore 18 + lw s1, 4(sp) + .cfi_restore 9 + lw s0, 8(sp) + .cfi_restore 8 + lw ra, 12(sp) + .cfi_restore 1 + addi sp, sp, 16 + .cfi_def_cfa_offset 0 + jr t1 + .cfi_endproc +FUNC_END (__riscv_restore_tailcall_12) +FUNC_END (__riscv_restore_tailcall_11) +FUNC_END (__riscv_restore_tailcall_10) +FUNC_END (__riscv_restore_tailcall_9) +FUNC_END (__riscv_restore_tailcall_8) +FUNC_END (__riscv_restore_tailcall_7) +FUNC_END (__riscv_restore_tailcall_6) +FUNC_END (__riscv_restore_tailcall_5) +FUNC_END (__riscv_restore_tailcall_4) +FUNC_END (__riscv_restore_tailcall_3) +FUNC_END (__riscv_restore_tailcall_2) +FUNC_END (__riscv_restore_tailcall_1) +FUNC_END (__riscv_restore_tailcall_0) + +#endif /* __riscv_32e */ + +#endif /* __riscv_xlen == 64 */ diff --git a/libgcc/config/riscv/t-elf b/libgcc/config/riscv/t-elf index 415e1fffbe7..6b105b40d82 100644 --- a/libgcc/config/riscv/t-elf +++ b/libgcc/config/riscv/t-elf @@ -1,8 +1,9 @@ LIB2ADD += $(srcdir)/config/riscv/save-restore.S \ + $(srcdir)/config/riscv/restore-tail.S \ $(srcdir)/config/riscv/muldi3.S \ $(srcdir)/config/riscv/multi3.c \ $(srcdir)/config/riscv/div.S \ $(srcdir)/config/riscv/atomic.c \ # Avoid the full unwinder being pulled along with the division libcalls. LIB2_DIVMOD_EXCEPTION_FLAGS := -fasynchronous-unwind-tables